Title of Invention

"A CONTROL SYSTEM FOR REGULATED COMPENSATORS OF SURPLUS REACTIVE CAPACITY OF TRANSMISSION LINES"

Abstract

"A control system for regulated compensators of surplus reactive capacity of transmission lines" This invention relates to a control system for regulated compensators of surplus reactive capacity of transmission lines comprising a reactor transformer (1) having three windings as main winding as primary (2), the control winding as secondary (3) and the compensating windings as tertiary (4), said control winding is provided with a tap (15) at 50% of its turn and is brought out with a suitable bushing for external connection, characterised in that the said 50% tapping of the control winding is connected in parallal with three sets of chokes (L1, L2, L3) which are individually connected in series with an anti parallel pair (valve) of thyristor (Tl, T2, T3), the other ends of said thyristor valves are connected to the neutral end of the said control windings and the 100% end of said control winding is connected through another pair of anti parallel thyristor (T4) the other end of which is connected to the neutral end of said control windings and a controlled shunt reactor controller (6) is provided for analog inputs of system voltage (VL), line load current (IL) and CSR current (ICSR) to process these signals and compute and provides an output signal for the firing circuits (7) for firing pulses.

Full Text

The invention relates to a control device for regulated compensators of surplus reactive capacity of transmission lines and more particularly a complete control device for Controlled shunt reactor (CSR) consisting of Thyristor valve unit. Usually for the control of Reactive Capacity Compensators for the transmission lines, the measured value of reactive capacity at the point of compensator's installation is used. In this system it is not possible to divide the line's surplus reactive capacity and the reactive capacity transmitted over the line to the consumer which need not be compensated. There is another control system which uses the voltage deviation in order to determine the necessary capacity of reactor. But in this system the disadvantage is that the regime requirements can be in contradiction with the operation of control system of a reactor, because in order to provide the increase of transmitted power it is necessary to increase the voltage drop along the line. To maintain the nominal voltage level at the receiving end of a line the voltage at the supply end is to be increased. But in this case the reactor's control system will try to increase its capacity instead of decreasing. Therefore, the main object of the present invention is to provide a control device based on surplus reactive capacity of transmission line. Another object of the present invention is to provide a complete control system for Controlled Shunt Reactor (CSR) consisting of Thyristor valve unit, Microprocessor based measurement and logic unit for generation of control pulses, voltage and current transformers for measurement with necessary power supplies with a difference that, the main control channel regulates the CSR current using the line load current for calculation of the required reactor current on the basis of comparison of required and measured CSR current determines the necessary time delay of firing pulses for power thyristors. Yet another objective of the present invention is to provide a control system with a difference such that the current wave form zero transition is realized by a comparator in voltage measurement channel when the CSR current is not available and subsequently changing to zero transition of current measurement channel as the CSR current becomes available. Further object of the present invention is to provide a control system with a difference such that the pilot signal for circuit breaker operation is used to bring the CSR current to the nominal value with a response time of 10 ms. Yet a further object of the present invention is to provide a control system with a difference such that in the case of failure of Microprocessor based logic system it continues to produce firing pulses at the instant of current transition through zero in order to provide the nominal current of,,CSR. The nature of the invention, its objective as further advantages residing in the same will be apparent from the following description made with reference to non-limiting exemplary embodiments of the invention represented in the accompanying drawings. Figure 1 - Single phase Representation of control scheme. Figure 2 - Represents control system for each phase of a reactor. Description of Fig. 1 The Controlled shunt reactor configuration is explained with a single phase schematic as shown in Fig. 1. The reactor transformer (1) contains three windings the primary (2), the secondary (control winding) (3) and the tertiary ( compensating winding) (4). The primary (2) and the control windings (3) are star connected with neutral earthed where as the compensating winding (4) is connected in delta. The primary winding is the high voltage winding while the control and compensating windings are the low voltage windings. The control winding is provided with a tap at 50% (5) of its turns and this is brought out with suitable bushing for external connection. As seen in the Fig. 1 the 50% tapping of the control winding is connected in parallel with three sets of chokes ( L1 , L2, L3) which are individually connected in series with an anti parallel pair (valve)- 4 of thyristors (T1 , T2, T3 ) . The other ends of the thyristor valves are connected to the neutral end of the control winding. The 100% end of the control winding is connected through another pair of anti parallel thyristors (T4) with the other end of thyristor pair connected to the neutral end of control winding. As shown in the schematic the controller (6) is provided with three analog inputs namely, system voltage (V ), line load current (IL )and CSR current (ICSR). The •Li Li CoK controller processes these signals and computes the necessary firing angles and outputs the necessary analog signals to the firing cards of the firing circuits (7). The firing cards provide the firing pulses to the appro -priate thrystors. The CSR controller (6) is provided with some digital input channels for processing of porotection signals and pilot signals. The analog inputs of system voltage (VL ) is provided by a voltage trans- former (8), CSR current (ICSR) by a CSR current transformer (9) and line load current (IL) from a line current transformer. Description of Fig. 2 The Fig. 2 shows schematic representation of the control system realisation. The hardware is VME bus (1f) based microprocessor architecture. There are two CPU (IT) modules ( 12) and one of the CPU is used for reading LI the analog inputs through the ANALOG INPUT UNIT where as the other CPU is used for display of the computed values like voltages and currents on the monitor. The CPU based on the control algorithm computes the firing angle for the thyristors (Tl, T2, T3, T4) the analog outputs through the ANALOG OUTPUT UNIT (15) which are in turn connected to the firing cards via an amplifier (16). The firing cards generate the necessary firing pulses for the appropriate thyristors. The CPU receives the protection signals (17) and other digital inputs through the DIGITAL INPUT UNIT (18) and processes them. The necessary digital outputs like alarms and trips are generated through a DIGITAL OUTPUT UNIT (19) for annunciation. As seen in the fig. 2 the voltage signal (VL), CSR current (!CSR) are also given to the firing cards for synchronization. The CPU meant for display of parameters on the monitor handles keyboard interface for entering initial data to the control system. According to the present invention there is provided a control system for regulated compensators of surplus reactive capacity of transmission lines comprising a reactor transformer having three windings as main winding as primary, the control winding as secondary and the compensating windings as tertiary, said control winding is provided with a tap at 50% of its turn and is brought out with a suitable bushing for external connection, characterised in that the said 50% tapping of the control winding is connected in parallel with three sets of chokes which are individually connected in series with an anti parallel pair (valve) of thyristor, the other ends of said thyristor valves are connected to the neutral end of the said control windings and the 100% end of said control winding is connected through another pair of anti parallel thyristor (T4) the other end of which is connected to the neutral end of said control windings and a controlled shunt reactor controller is provided for analog inputs of system voltage, line load current and CSR current to process these signals and compute and provides an output signal for the firing circuits for firing pulses. said control winding is connected through another pair of anti parallel thyristor (T4) the other end of which is connected to the neutral end of said control windings and a controlled shunt reactor controller is provided for analog inputs of system voltage, line load current and CSR current to process these signals and compute and provides an output signal for the firing circuits for firing pulses. To accomplish this task microprocessors are used. As power thyristors are employed in different sections of control winding it is necessary to produce required control pulses for each section separately. It is necessary to note that these control pulses synchronized with the respective phase of reactor's current are to be produced in case of control .system failure also. In order to change the reactor's current it is necessary to vary the instant of control pulse generation. It means that it is necessary to provide a time delay for each control pulse separately with respect to the instant of current wave transition through its zero. The bigger is the time delay the less is the conducting angle of a thyristor and the less is the current in the control winding section. Correspondingly the current in the main winding decreases. When the time delay is equal to one quarter of a cycle ( 90 deg), the conducting angle is equal to zero and the current through thyristor is zero. This means a second task of the control system which is to provide the variation of time delay for each power thyristor separately from zero to 5 ms. (for 50 Hz). The control system is realized on a micro processor based hardware and it provides the measurement of inputs, their conversion to digital form and computations to vary the time delay for the control pulses. The inputs measured are line current, the reactor current and the line voltage. In order to determine the zero transition of the current wave form, comparators are used. These comparators convert the sinusoidal current wave forms into rectangular pulses which are used for the synchronization of control pulses with the reactor's current ( fig.2). Separate firing circuit cards are used for current and voltage synchronization. However, the firing circuit and synchronized with current is blocked/deblocked depending upon the minimum current available in reactor. When the line is not energized it is impossible to use current measurement for the reference of the instant of a current transition through zero. In this case it is possible to utilize the voltage measurement for the reference of current transition through zero. With a relatively small error taking into account that the current through the inductance lags the voltage by 90 deg. and the voltage measurement is always provided from the VT (Voltage transformer) available on the bus of the substation. There are also some digital inputs to receive protection signals and pilot signal for circuit breaker operation. The micro processor drives the display panel and also handles key board interface for entering the initial data to the control system. The control system consists of four different control channels; reactor current control, voltage control, circuit breaker operation and protection of reactor for internal faults. THE OPERATION OF FIRST CONTROL CHANNEL: The first channel provides the control of a reactor current in normal regime of a transmission line operation. The current in the line is measured by a measuring current transformer. The measured current is converted into voltage and the micro processor hardware converts it into the digital form. The program residing in the microprocessor computes the necessary reactor current for a given line current according to the formula I is natural current of the line, is the wave length of a line, IT is the measured current in the line. L The actual reactor current, which is measured by another current transformer is also sampled by the microprocessor and is converted into digital form. The µP ( Microprocessor) compares the computed and the measured values of reactor current ie., calculated by formula (1) and measured through the CT of the reactor. In accordance with the previous explanation in the initial condition of the control system a time delay for all trigger control pulses are zero, which corresponds to the idle regime of a line operation and to the nominal regime of a reactor operation* All thyristors are conducting fully. When the line current increases the calculated current of the reactor decreases. The difference between measured and calclated current becomes positive. In this case it is necessary to increase time delay of the control pulse for the biggest section of the control inding CW. And the larger is the difference the bigger will be the time delay. For example, if this difference is equal to one half from the nominal current it is necessary to increase the time delay of control pulse for last section of CW up to the quarter of a cycle. In this case the current in the last ( biggest) section of CW will stop. But time delay's for other control pulses are to be equal to zero. When the line current continues to increase the calculated reactor current decreases In this case it is necessary to increase the time delay of a control pulse for thyristors of the next section (the biggest in the operating sections) . After closing the thyristors of this sectlOnit is necessary to increase time delay of control impulse for next section and so on up to the closing of all thyristors in the CW. When the difference of measured and calculated currents of a reactor is negative it is necessary to repeat all procedure described above in reverse order. It is necessary to decrease time delay of control pulses until the difference between measured and calculated values of a reactor current becomes zero. And at first it is necessary to decrease time delay of a control pulse for the smaller sections which are in the operation and then for other section in turn till the biggest ones. In the case of a different CSR configration, where only one thyristor block is in parallel with the total control ,winding, the procesure of thyristor control is simplified because it is necessary to vary time delay of control pulses for only one thyristor block. The first channel is the channel of continuous regulation of a reactor current, for which very fast response is not required. For this reason it is possible to choose a time interval ( sampling time) for the current meausrement as one cycle of line frequency or one half of a cycle. THE SECOND CHANNEL OPERATION The voltage measured by voltage transformer sensed through the voltage-voltage converter and gets converted to the digital form by the Microprocessor. The time interval for the voltage measrement is to be less than for current ( half a cycle or a quarter of cycle) because the voltage deviation from the permissible level indicates some disturbance in the transmission system. This measured value of voltage is compared with the permissible level of voltage (1.05 Unom 0.95 Unom), which can be set by the operator. If the measured voltage is inside the permissible limits, this channel remains without operation. When the measured voltage is outside the permissible limits/ this channel blocks the operatin of first channel immediately. If the measured voltage is greater than the maximum permissible level, second channel decreases time delay of control pulses until the voltage decreases up to the permissible level. After this second channel blocks itself and first channel start to operate again. If the line voltage increases above the permissible level again, the second channel start to operate as in previous case and gives a signal for the operator that it is necessary to check the transmission system. On the contrary if the measured line voltage is less than the minimum permissble level, second channel increases time delay of control pulses until the voltage increases up to the permissible level and then blocks itself. First channel starts to operate again, but if the line voltage decreases under permissible level again second channel starts to operate as in previous case and gives a signal for the operator thai it is necessary to check the transmission system . In order to determine only surplus reactive capacity of transmissin line it is proposed to use the measurement of line current i.e. on the basis of this measurement to calculate the necessary reactor's current. By this way always the current compensation is provided which is only for the surplus reactive capacity of a transmission line in accordance with its operating regime. The control of reactor's current is realized by means of variation of firing ange of Power Thyristors in sections of control winding (Fig.t). In order to change a power thyristor's firing angle it is necessary to change the instants of control pulse generation. If this instant corresponds to the transition of a reactor's current over zero, the firing angle of power thyristor is the maximum ( 180 deg.). This is the initial condition of the control system when the control system in put in operation it starts generating control pulses at the instant of reactor current's transition through zero. Here, the reactor's current is the maximum and it is equal to the nominal current . It means that the first task of a control system is to produce control pulses or power thyristors which are synchronized with the reactor's current at the instant of reactor current's transition through zero in each phase. THIRD CHANNEL OPERATION Third channel starts to operate from the pilot signal for the operation of a line circuit breaker ( for switching in or for switching off). It blocks the first and the second channels. In this case the control system returns to the initial condition when the time delay or each control pulse zero. The conduction angle for each power thyristor will be 180 deg. The reactor current increases up to maximum ( upto nominal current). After a certain time which is to be set by operator previously ( for example 1 sec) third channel blocks and the first channel starts to operate. For this reason for any switching operation of a line the reactor's capacity is the maximum during the possible time of transient process including automatic re-close operation. FOURTH CHANNEL OPERATION Fourth channe comes into operation from any of the protection signals of the reactor. These can be abnormal increase of winding temperature, Buccholtz relay, differential etc. When fourth channel takes over it blocks the first and second channels and increase the time delay for all control pulses upto the maximum ( 90 deg). In this case the reactor current decreases upto the minimum which corresponds to the idle regime of the reactor. In addition to this the control system gives an emergency annunciation. In case of the Microprocessor failure the time delay computation for all control pulses will not be available and the control pulses for all power thyristors will be 90 deg. With respect to voltage wave form The reactor current increase upto the nominal current, also there will be an annunciation for controller failure. WE CLAIM; 1. A control system for regulated compensators of surplus reactive capacity of transmission lines comprising a reactor transformer (1) having three windings as main winding as primary (2), the control winding as secondary (3) and the compensating windings as tertiaiy (4), said control winding is provided with a tap (15) at 50% of its turn and is brought out with a suitable bushing for external connection, characterised in that the said 50% tapping of the control winding is connected in parallel with three sets of chokes (LI, L2, L3) which are individually connected in series with an anti parallel pair (valve) of thyristor (Tl, T2, T3), the other ends of said thyristor valves are connected to the neutral end of the said control windings and the 100% end of said control winding is connected through another pair of anti parallel thyristor (T4) the other end of which is connected to the neutral end of said control windings and a controlled shunt reactor controller (6) is provided for analog inputs of system voltage (VL), line load current (!L) and CSR current (ICSR) to process these signals and compute and provides an output signal for the firing circuits (7) for firing pulses. 2. A control system for regulated compensators as claimed in claim 1 wherein said CSR controller receives analog inputs voltage (VL) from a voltage transformer (8), CSR current (IcsR) from a CSR current transformer (9) and line load current (!L) from a line current transformer (10). 3. A control system for regulated compensators as claimed in claims and 2 wherein the said control circuit hardware in VME bus (11) microprocessor architecture having two CPU modules (12) and a console (13), and an analog input unit (14) to received the said inputs of system voltage (VL), CSR current (!CSR) and line load current (!L), the said CPU computes the firing angle of said thyristor (T1, T2, T3, T4) and generates the analog outputs through the analog output unit (15) which is connected to the firing cards of the said firing circuits (7) through an amplifier (16). 4. A control system for regulated compensators as claimed in claim 3 wherein said CPU (12) connected via the said VME bars (11) to receive protection (17) and the other digital inputs through digital input unit (18) and process them for a digital output like alarms and trips generated through a digital output unit (19) for annunciation. 5. A control system for regulated compensators as claimed in claims 3 and 4 wherein an input of said voltage signal (VL) is provided to one of the firing circuits (7) and an input of said CSR current ICSR is provided to the other firing circuits (7). 6. A control system for regulated compensators as claimed in claims 3,4 and 5 wherein one of the two CPU (12) is meant for display of parameters on the monitor (13) having keyboard interface for entering initial data to the control system. 7. A control system for regulated compensators as claimed in claim 1 wherein the said primary (2) and the control windings (3) are star connected with neutral earthed whereas the compensating windings () is connected in delta. 8. A control system for regulated compensators of surplurs reactive capacity of transmission lines as herein described and illustrated in the accompanying drawings.

Documents:

1481-del-1998-abstract.pdf

1481-del-1998-claims.pdf

1481-del-1998-correspondence-others.pdf

1481-del-1998-correspondence-po.pdf

1481-del-1998-description (complete).pdf

1481-del-1998-drawings.pdf

1481-del-1998-form-1.pdf

1481-del-1998-form-19.pdf

1481-del-1998-form-2.pdf

1481-del-1998-form-4.pdf

1481-del-1998-form-5.pdf

1481-del-1998-form-6.pdf

1481-del-1998-gpa.pdf