Title of Invention	AN IMPROVED PROCESS OF FABRICATING METALLIZED SUBSTRATES USEFUL FOR MAKING ELECTRONIC DEVICES AND CIRCUITS.
Abstract	An improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a thin layer of 5-6 urn of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using plating-deplating sequence such as herein described till the requisite thickness is obtained, cleaning the resultant plated substrate with de ionized water, electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold.

Title of Invention

AN IMPROVED PROCESS OF FABRICATING METALLIZED SUBSTRATES USEFUL FOR MAKING ELECTRONIC DEVICES AND CIRCUITS.

Abstract

An improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a thin layer of 5-6 urn of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using plating-deplating sequence such as herein described till the requisite thickness is obtained, cleaning the resultant plated substrate with de ionized water, electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold.

Full Text	This invention relates to an improved process of fabricating metallized substrates useful for making electronic devices and circuits. Metallized alumina substrate for MIC applications involves metallizations consisting of about 50 nm thick chromium layer followed by 200 nm gold using physical vapour deposition techniques like electron beam evaporation or sputtering. A thick gold layer of 5-6 um is electroplated on top of the above evaporated or sputtered metal films which is subsequently patterned using lithography and etching to produce microwave integrated circuit layout. Active devices and passive components are mounted on such a gold pattern to complete the functional circuits. Generally, MIC patterns cover a smaller area on the substrate and most of the metallization is etched away in patterning. In order to reduce the cost of MIC, gold layer in the conventional metallization, described above, can be replaced by copper. However, due to environmental degradation of copper, a thin protective layer of gold is finally needed to be plated on copper layer. High quality electroplated copper with high conductivity and minimum voids per unit area would thus serve the purpose of fabricating MIC patterns at reduced cost. With the available prior art methods, it is not possible to achieve the level of defect free deposition of copper which will be suitable as metallized substrate for MIC applications. References may be made to W.S. Rapson and T. Groenewald, Gold Usage, Academic Press, London. In conventional method people have used dc electroplating of copper wherein the following drawbacks were noted. (a) DC electroplating of copper produces poros metal layers due to large voids density. (b) Adhesion of dc electroplated layer is rather poor. (c) Due to voids the conductivity of dc plated layer is less than that of bulk. In pulse plating the current is passed for a short duration and plating takes place. This is followed by no plating over certain duration which causes removal of co-deposited hydrogen. In another version, plating-no plating sequence can be replaced by plating-deplating sequence for further improvement. However, even with all these combination the method has been noted to have following drawbacks. (a) The optimization of pulse plating parameters is rather difficult as it depends upon job of plating. (b) The void density has not been reduced beyond 10 / sq. inch. The hitherto known process used for fabricating metallized alumina substrate for MIC is to sputter 100 - 200 A° cromium followed by 0.2 - 0.3 jj, m gold, the thickness of gold is increased to 5 - 7 (j, m by electroplating. Process related to fabricating metallized alumina substrates for MIC applications in the present context, commonly available and known hitherto, have the following major drawbacks, (a) Metallized alumina substrates using Cr-Au(sputtered)-Au(plated) is more expensive than Cr-Cu(sputtered)-Cu(plated)-Au(plated) wherein a very thin protective layer of gold is provided only at the top. (b) Gold plating involves potassium-gold-cyanide based electrolytes which are hazardous materials. Properly exhausted bench with provision for effluent treatment is mandatory and therefore difficult to maintain in production environment. (c) Except environmental degradation problem, copper has higher bulk conductivity than gold and hence is a better material for high frequency signal transmission. The present invention provides an improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a thin layer of 5-6 um of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using plating-de plating sequence such as herein described till the requisite thickness is obtained, cleaning the resultant plated substrate with de ionized water, electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold. The main object of the present invention is to provide an improved process of fabricating metallized substrates useful for making electronic devices and circuits which obviates the hitherto known drawbacks as described above. Another object of the present invention is to provide a less expensive process where only a thin layer of gold is provided at the top for environmental protection. In the process of the present invention the metallized substrates have been prepared using sequential plating and de plating using pulse electroplating technique. Accordingly the present invention provides an improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a thin layer of 5-6 um of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using plating-de plating sequence such as herein described till the requisite thickness is obtained, cleaning the resultant plated substrate with de ionized water ,electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold. In a feature of the present invention commercially available analytical reagent (AR) grade chemicals may be used for copper plating. In another feature of the present invention the voids free high conductivity copper layer may be deposited using a specific sequence of plating-de plating current pulses: Plating ON time (10m Sec); De plating Time (4 Sec.) Plating OFF time (5m Sec); Peak Plating Current (130mA) Plating Time (10 Sec.); Peak De plating Current (70 mA). There are a number of copper electrolyte formulations available in the market with proprietary constituents. In order to keep the formulation simple, an acidic electrolyte based on CuS04 and H2S04 was chosen in the present work. Constant temperature bath with provision for controlled bath stirring magnetic stirrer was used to arrive at appropriate current density and bath temperature in order to reduce the voids density to minimum. Visual inspection under high magnification microscope and scanning electron microscope ( SEM ) were used to estimate voids density in the plated copper. Requisite combination of current density, bath temperature and stirring rate coupled with pulse plating consisting of plating-deplating sequences have been used. Pulse plating can be of two types. One having plating and no plating sequence and the other with plating and de plating combination. In pulse plating, higher current density can be used during plating pulse keeping duty factor within proper range. When a plating pulse is followed by no plating for certain period, metal ion density is replenished in the neighbour hood of cathode. This allows for high plating current density. Further, during following pulse nucleations starts at newer sites, thus leading to reduced voids density. Desorption of loosely bound deposits also help in improving the quality of plated metal layer. In plating-deplating sequence, deplating removes loosely bound material (plated) along with some part of the compact layer as well. Thus quality improves further but at the cost of reduced deposition rate. The present invention provides an improved process for fabricating metallized substrates useful for microwave integrated circuits (MICs), where conventionally used gold layer is replaced by electroplated copper layer, seed layers of chromium and copper deposited by RF/DC sputtering after proper surface preparation involving organic solvent degreasing followed by alkali and acid treatments and a final dip in dilute HF in DI water, using a simple acidic sulphate type of electrolyte at 30-45 °C wherein agitation is provided by magnetic stirrer, high quality, voids free high conductivity copper layer of 5-6 um thickness plated within 10 minutes on either side of the substrate in an appropriate jig by applying plating-deplating type of current source, after completing the copper electroplating substrates are thoroughly rinsed and transferred to gold plating bath for depositing a thin protective layer of gold, final rinse in deionised water and drying of the substrate in nitrogen ambient gives metallized alumina substrates for further processing of MIC pattema. Novelty of the process Qf the present invention consists of fabrication of metallized substrate, such as alumina substrate, with 5-6 um thick voids free high conductivity copper on sputter coated chromium-copper seed layer. A protective layer of thin gold (0.2 um) is provided at the top of copper layer. An embodiment of the process of the present invention is described in detail below: Alumina substrate is prepared by several steps of cleaning involving organic solvents, alkali and acid preparations. Substrates are treated with acetone, trichloroethylene, acetone by boiling in a beaker containing sufficient solvent for 5 -10 minutes in each solvent. Next treatment is boiling the substrate in H2O : H2O2: NH^OH :: 7 : 2 : 1 mixture at 30 - 40 °C for 10 minutes. After rinsing the substrate thoroughly in deionised water and treating under ultrasonic the substrate are dipped in concentrated HNO3 followed by another dip in NHjOH . Thorough boiling in DI water for 10 minutes renders the substrates reasonably clean. A final dip in HF : H2O :: 1:4 is the last cleaning step. Drying in nitrogen ambient is followed by immediate loading into the sputtering chamber. After sputter cleaning of the substrate, chromium is dc sputter coated to a thickness of 50 nm. Next copper is sputter coated to a thickness of 200 nm using rf magnetron sputtering. The substrates are taken out of the sputtering unit and electroplating is started in a conventional bath kept ready for use which may have the composition given below: CuSO4 - 200 gm H2SO4 - 27.25ml H20 - 1000ml Bath is mixed well and heated to a temperature of 30-45°C in a pyrex glass beaker using magnetic stirrer and hot plate. The substrate is held in a jig with proper connection for applying plating voltage. For one square inch substrates the anode (6,Fig.B) to cathode separation is about 30 mm. Area of anode is almost equal to cathode. Pulse plating parameters may be chosen as given below. Plating ON time (10 m sec.) Deplating time (4 sec.) Plating OFF time (5 m sec.) Peak plating current (130 mA) Plating time (10 sec.) Peak deplating current (70 mA) The plating is continued for 7-9 minutes to get the thickness of the plated copper around 5-6 (am. After the completion of electroplating, the substrate is thoroughly rinsed in deionized water before loading the substrate to gold plating bath also kept ready. DC plating of gold to a thickness of about 0.1-0.2 um is sufficient for environmental protection. The following example is given by way of illustration of the present invention and should not be construed to limit the scope of the present invention. Example-1 An alumina substrate metallized using 40nm titanium, 200 nm platinum and 200 nm gold sequentially. The substrates are taken out of the sputtering unit and electroplating is started in a bath kept ready for use having the composition given below. CuSO4 - 200 gm H2S04 - 27.25ml H2O - 1000ml Bath is mixed well and heated to a temperature of 35°C in a pyrex glass beaker using magnetic stirrer and hot plate. The substrate is held in a jig with proper connection for applying plating voltage. For one square inch substrates the anode to cathode separation is about 30 mm. Area of anode is almost equal to cathode. Pulse plating parameters are chosen as given below. Plating ON time (10 m sec.); Deplating time (4 sec.); Plating OFF time (5 m sec.); Peak plating current (130 mA); Plating time (10 sec.); Peak deplating current (70 mA). The plating is continued for 8 minutes to get the thickness of the plated copper around 5-6 um. After the completion of electroplating, the substrate is thoroughly rinsed in deionized water before loading the substrate to gold plating bath also kept ready. DC electroplating of gold to a thickness of about 0.1 (im is done which is sufficient for environmental protection. The main advantages of the present invention are: 1. Drastic reduction in voids formation is observed in case of pulse plating involving plating- deplating sequence optimised for a given specific job. 2. Grain size and stress have also been reduced considerably so that lithographic patterning could be done with a better definition. 3. The present process could very well be extended to integral beam lead and integral heatsink formations in the fabrication of high frequency semiconductor devices. 4. Cost reduction is one major achievement of the present process where high quality copper replaces gold with obvious benefits in case of metallized substrate. 5. In case of integral heatsink and integral beam lead formations the present structure results in better heat sinking properties of copper alongwith overall cost reduction of the finished devices specially in case of high frequency two terminal type of devices. We Cl aim 1. An improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a of 5-6 µm of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using\plating-deplating sequence of plating-deplating current pulses: Plating ON time (10 m Sec); Deplating Time (4 Sec.) Plating OFF time (5 m Sec); Peak Plating Current (130 m A) Plating Time (10 Sec.); Peak Deplating Current (70 m A) lill the requisite thickness is obtained, cleaning the resultant plated substrate with deionized water, electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold. 2.An improved process of fabricating metallized substrate useful for making electronic devices and circuits substantially as herein described with reference to the examples.

Full Text

This invention relates to an improved process of fabricating metallized substrates useful for making electronic devices and circuits.
Metallized alumina substrate for MIC applications involves metallizations consisting of about 50 nm thick chromium layer followed by 200 nm gold using physical vapour deposition techniques like electron beam evaporation or sputtering. A thick gold layer of 5-6 um is electroplated on top of the above evaporated or sputtered metal films which is subsequently patterned using lithography and etching to produce microwave integrated circuit layout. Active devices and passive components are mounted on such a gold pattern to complete the functional circuits. Generally, MIC patterns cover a smaller area on the substrate and most of the metallization is etched away in patterning. In order to reduce the cost of MIC, gold layer in the conventional metallization, described above, can be replaced by copper. However, due to environmental degradation of copper, a thin protective layer of gold is finally needed to be plated on copper layer. High quality electroplated copper with high conductivity and minimum voids per unit area would thus serve the purpose of fabricating MIC patterns at reduced cost. With the available prior art methods, it is not possible to achieve the level of defect free deposition of copper which will be suitable as metallized substrate for MIC applications. References may be made to W.S. Rapson and T. Groenewald, Gold Usage, Academic Press, London.
In conventional method people have used dc electroplating of copper wherein the following drawbacks were noted.
(a) DC electroplating of copper produces poros metal layers due to large voids density.
(b) Adhesion of dc electroplated layer is rather poor.
(c) Due to voids the conductivity of dc plated layer is less than that of bulk.
In pulse plating the current is passed for a short duration and plating takes place. This is followed by no plating over certain duration which causes removal of co-deposited hydrogen. In another version, plating-no plating sequence can be replaced by plating-deplating sequence for further improvement. However, even with all these combination the method has been noted to have following drawbacks.
(a) The optimization of pulse plating parameters is rather difficult as it depends upon
job of plating.
(b) The void density has not been reduced beyond 10 / sq. inch.
The hitherto known process used for fabricating metallized alumina substrate for MIC is to sputter 100 - 200 A° cromium followed by 0.2 - 0.3 jj, m gold, the thickness of gold is increased to 5 - 7 (j, m by electroplating.
Process related to fabricating metallized alumina substrates for MIC applications in the present context, commonly available and known hitherto, have the following major drawbacks, (a) Metallized alumina substrates using Cr-Au(sputtered)-Au(plated) is more expensive than
Cr-Cu(sputtered)-Cu(plated)-Au(plated) wherein a very thin protective layer of gold is
provided only at the top.
(b) Gold plating involves potassium-gold-cyanide based electrolytes which are hazardous
materials. Properly exhausted bench with provision for effluent treatment is mandatory and
therefore difficult to maintain in production environment.
(c) Except environmental degradation problem, copper has higher bulk conductivity than
gold and hence is a better material for high frequency signal transmission.
The present invention provides an improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using
conventional methods, depositing a binding layer such as chromium, titanium followed by a thin layer of 5-6 um of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using plating-de plating sequence such as herein described till the requisite thickness is obtained, cleaning the resultant plated substrate with de ionized water, electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold.
The main object of the present invention is to provide an improved process of fabricating metallized substrates useful for making electronic devices and circuits which obviates the hitherto known drawbacks as described above.
Another object of the present invention is to provide a less expensive process where only a thin layer of gold is provided at the top for environmental protection.
In the process of the present invention the metallized substrates have been prepared using sequential plating and de plating using pulse electroplating technique.
Accordingly the present invention provides an improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a thin layer of 5-6 um of copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using plating-de plating sequence such as herein described till the requisite thickness is obtained, cleaning the resultant plated substrate with de ionized water ,electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold.
In a feature of the present invention commercially available analytical reagent (AR) grade chemicals may be used for copper plating.
In another feature of the present invention the voids free high conductivity copper layer may be deposited using a specific sequence of plating-de plating current pulses: Plating ON time (10m Sec); De plating Time (4 Sec.) Plating OFF time (5m Sec); Peak Plating Current (130mA) Plating Time (10 Sec.); Peak De plating Current (70 mA).
There are a number of copper electrolyte formulations available in the market with proprietary constituents. In order to keep the formulation simple, an acidic electrolyte based on CuS04 and H2S04 was chosen in the present work. Constant temperature bath with provision for controlled bath stirring magnetic stirrer was used to arrive at appropriate current density and bath temperature in order to reduce the voids density to minimum. Visual inspection under high magnification microscope and scanning electron microscope ( SEM ) were used to estimate voids density in the plated copper. Requisite combination of current density, bath temperature and stirring rate coupled with pulse plating consisting of plating-deplating sequences have been used.
Pulse plating can be of two types. One having plating and no plating sequence and the other with plating and de plating combination. In pulse plating, higher current density can be used during plating pulse keeping duty factor within proper range. When a plating pulse is followed by no plating for certain period, metal ion density is replenished in the neighbour hood of cathode. This allows for high plating current density. Further, during following pulse nucleations starts at newer sites, thus leading to reduced voids density. Desorption of loosely bound deposits also help in improving the quality of plated metal layer. In plating-deplating sequence, deplating removes loosely bound material (plated) along with some part of the compact layer as well. Thus quality improves further but at the cost of reduced deposition rate.

The present invention provides an improved process for fabricating metallized substrates useful for microwave integrated circuits (MICs), where conventionally used gold layer is replaced by electroplated copper layer, seed layers of chromium and copper deposited by RF/DC sputtering after proper surface preparation involving organic solvent degreasing followed by alkali and acid treatments and a final dip in dilute HF in DI water, using a simple acidic sulphate type of electrolyte at 30-45 °C wherein agitation is provided by magnetic stirrer, high quality, voids free high conductivity copper layer of 5-6 um thickness plated within 10 minutes on either side of the substrate in an appropriate jig by applying plating-deplating type of current source, after completing the copper electroplating substrates are thoroughly rinsed and transferred to gold plating bath for depositing a thin protective layer of gold, final rinse in deionised water and drying of the substrate in nitrogen ambient gives metallized alumina substrates for further processing of MIC pattema.
Novelty of the process Qf the present invention consists of fabrication of metallized substrate, such as alumina substrate, with 5-6 um thick voids free high conductivity copper on sputter coated chromium-copper seed layer. A protective layer of thin gold (0.2 um) is provided at the top of copper layer.
An embodiment of the process of the present invention is described in detail below:
Alumina substrate is prepared by several steps of cleaning involving organic solvents, alkali and acid preparations. Substrates are treated with acetone, trichloroethylene, acetone by boiling in a beaker containing sufficient solvent for 5 -10 minutes in each solvent. Next treatment is boiling the substrate in H2O : H2O2: NH^OH :: 7 : 2 : 1 mixture at 30 - 40 °C for 10 minutes. After rinsing the substrate thoroughly in deionised water and treating under ultrasonic the substrate are dipped in concentrated HNO3 followed by another dip in NHjOH . Thorough boiling in DI water for 10 minutes renders the substrates reasonably clean. A final dip in HF : H2O :: 1:4 is the last cleaning
step. Drying in nitrogen ambient is followed by immediate loading into the sputtering chamber. After sputter cleaning of the substrate, chromium is dc sputter coated to a thickness of 50 nm. Next copper is sputter coated to a thickness of 200 nm using rf magnetron sputtering. The substrates are taken out of the sputtering unit and electroplating is started in a conventional bath kept ready for use which may have the composition given below:
CuSO4 - 200 gm
H2SO4 - 27.25ml
H20 - 1000ml
Bath is mixed well and heated to a temperature of 30-45°C in a pyrex glass beaker using magnetic
stirrer and hot plate. The substrate is held in a jig with proper connection for applying plating
voltage. For one square inch substrates the anode (6,Fig.B) to cathode separation is about 30 mm.
Area of anode is almost equal to cathode. Pulse plating parameters may be chosen as given below.
Plating ON time (10 m sec.) Deplating time (4 sec.)
Plating OFF time (5 m sec.) Peak plating current (130 mA)
Plating time (10 sec.) Peak deplating current (70 mA)
The plating is continued for 7-9 minutes to get the thickness of the plated copper around 5-6 (am. After the completion of electroplating, the substrate is thoroughly rinsed in deionized water before loading the substrate to gold plating bath also kept ready. DC plating of gold to a thickness of about 0.1-0.2 um is sufficient for environmental protection.
The following example is given by way of illustration of the present invention and should not be construed to limit the scope of the present invention.
Example-1
An alumina substrate metallized using 40nm titanium, 200 nm platinum and 200 nm gold sequentially. The substrates are taken out of the sputtering unit and electroplating is started in a bath kept ready for use having the composition given below.
CuSO4 - 200 gm
H2S04 - 27.25ml
H2O - 1000ml
Bath is mixed well and heated to a temperature of 35°C in a pyrex glass beaker using magnetic stirrer and hot plate. The substrate is held in a jig with proper connection for applying plating voltage. For one square inch substrates the anode to cathode separation is about 30 mm. Area of anode is almost equal to cathode. Pulse plating parameters are chosen as given below.
Plating ON time (10 m sec.); Deplating time (4 sec.);
Plating OFF time (5 m sec.); Peak plating current (130 mA);
Plating time (10 sec.); Peak deplating current (70 mA).
The plating is continued for 8 minutes to get the thickness of the plated copper around 5-6 um. After the completion of electroplating, the substrate is thoroughly rinsed in deionized water before loading the substrate to gold plating bath also kept ready. DC electroplating of gold to a thickness of about 0.1 (im is done which is sufficient for environmental protection.
The main advantages of the present invention are:
1. Drastic reduction in voids formation is observed in case of pulse plating involving plating-
deplating sequence optimised for a given specific job.
2. Grain size and stress have also been reduced considerably so that lithographic patterning
could be done with a better definition.
3. The present process could very well be extended to integral beam lead and integral heatsink
formations in the fabrication of high frequency semiconductor devices.
4. Cost reduction is one major achievement of the present process where high quality copper
replaces gold with obvious benefits in case of metallized substrate.
5. In case of integral heatsink and integral beam lead formations the present structure results
in better heat sinking properties of copper alongwith overall cost reduction of the finished
devices specially in case of high frequency two terminal type of devices.

We Cl aim
1. An improved process for fabricating metallized substrates useful for making electronic devices and circuits which comprises cleaning of substrate using conventional methods, depositing a binding layer such as chromium, titanium followed by a of 5-6 µm of
copper by conventional method, electroplating the said coated substrate in a conventional copper bath under constant stirring of the electrolyte using\plating-deplating sequence of
plating-deplating current pulses: Plating ON time (10 m Sec); Deplating Time (4 Sec.) Plating OFF time (5 m Sec); Peak Plating Current (130 m A) Plating Time (10 Sec.); Peak Deplating Current (70 m A)
lill the requisite thickness is obtained, cleaning the resultant plated substrate with deionized water, electroplating the said cleaned plated substrate in a conventional gold bath so as to deposit a thin protective layer of gold.
2.An improved process of fabricating metallized substrate useful for making electronic devices and circuits substantially as herein described with reference to the examples.

Documents:

2518-del-1998-abstract.pdf

2518-del-1998-claims.pdf

2518-del-1998-correspondence-others.pdf

2518-del-1998-correspondence-po.pdf

2518-del-1998-description (complete).pdf

2518-del-1998-form-1.pdf

2518-del-1998-form-19.pdf

2518-del-1998-form-2.pdf

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Patent Number

215777

Indian Patent Application Number

2518/DEL/1998

PG Journal Number

12/2008

Publication Date

21-Mar-2008

Grant Date

03-Mar-2008

Date of Filing

26-Aug-1998

Name of Patentee

COUNCIL OF SCIENTIFIC AND INDUSTRIAL RESEARCH

Applicant Address

RAFI MARG, NEW DELHI-10001, INDIA.

Inventors:

#	Inventor's Name	Inventor's Address
1	MAHESH KUMAR	CENTRAL ELECTRONICS ENGINEERING RESEARCH INSTITUTE, PILANI, DISTRICT-JHUNJHUNU, RAJASTHAN, INDIA.
2	SHAMIM AHMAD	CENTRAL ELECTRONICS ENGINEERING RESEARCH INSTITUTE, PILANI, DISTRICT-JHUNJHUNU, RAJASTHAN, INDIA.

PCT International Classification Number

H01L 21/00

PCT International Application Number

N/A

PCT International Filing date

PCT Conventions:

#	PCT Application Number	Date of Convention	Priority Country
1			NA