Title of Invention

AN ELECTRICAL SENSOR CIRCUIT

Abstract A circuit for controlling a fail-safe operation of measurement and control apparatus (not shown) such as is used in a steam raising plant to monitor the water level in a steam generation vessel includes a sensor 10 which comprises an electrode which in use is inserted into a water/steam column (not shown) to detect the presence or absence of water. Typical applications of such apparatus include low or high level alarms on steam drums, feed heaters, deareators and turbine water induction prevention systems on steam lines. The apparatus detects the presence or absence of water by making a measurement of the impedance experienced in a gap between an insulated tip of the electrode and a surface held at a reference voltage or else connected to ground. The impedance measured when water is present is condiderably less than that measured when water is absent. The apparatus may be configured to proide an alarm when water is present and should not be, or vice versa.
Full Text ELECTRICAL SENSOR CIRCUIT
The present invention relates to an electrical sensor circuit and is concerned particularly, although not exclusively, with a fail-safe electrical sensor circuit for use in measurement and control apparatus incorporating level detection apparatus.
Fail-safe systems are used in measurement and control apparatus such as is used, for example, in a steam raising plant, where the level of water in a steam generation vessel is of critical importance. Level detection apparatus comprising a number of sensors immersed in water or steam is employed to monitor the water level. An example such level detection apparatus is described in our United Kingdom Patent No.l 056032 in the name of Central Electricity Generating Board. Known fail¬safe systems typically aim to output a fail-safe condition if there occurs a failure in the sensing circuit or else, for example, a loss of power. Such fail-safe systems are often extended so that a fail-safe output also results in the event of failure of a key specified component.
A drawback with the known fail-safe systems is that the failure of a component other than that which is specified will not be detected and will not automatically lead to a fail-safe output from the system.
According to the present invention there is provided an electrical sensor circuit, the circuit comprising: means arranged to supply to a sensor an alternating electrical signal to be attenuated at the sensor in accordance with a condition sensed by the sensor; an output stage arranged to indicate either a normal condition or a fault condition; an error detector arranged to receive the attenuated signal and to cause the output stage to indicate a fault condition if the error detector detects an open circuit or short circuit at the sensor; and first comparing means arranged to receive the attenuated signal and compare a value of the attenuated signal with a reference value, and to cause the output stage to indicate a fault condition if the value of the attenuated signal is indicative of an abdominal condition at the sensor, and wherein the first comparing means is arranged to provide an alternating output signal having a predetermined phase relative to the attenuated signal when the attenuated signal is indicative of a sensed normal condition; selecting means are arranged to enable selection between a plurality of alternatives of the nature of the abnormal condition determined by the first comparing means by setting the said reference value and a predetermined normal phase relation between the first comparing means output signal and the alternating electrical signal; and second phase comparing means are arranged to receive the output signal from the first comparing means and the alternating

electrical signal supplied to the sensor, and to cause the output stage to indicate a fault condition if the result of the phase comparison fails to indicate the predetermined normal phase relation between the first comparing means output signal and the alternating electric signal.
The output stage of the circuit may be arranged to drive a control device 20 which has a normal condition and a fail-safe condition such that the condition adopted by the control device is determined by the output of the circuit.
Preferably the output stage of the circuit includes a triple redundant switching means for driving the control device, wherein the switching means comprises three switches, each of which is capable alone of switching the control device to a safe condition.
Preferably the alternating electrical signal provided to the sensor is of a
substantially low frequency and is of a substantially square wave form. The signal
may comprise a clock signal

Preferably the condition sensed by the sensor in accordance with which the signal is attenuated is the impedance of the sensor.
Preferably the selecting means is arranged to select between a high sensed impedance and a low sensed impedance as the abnormal condition.
The first comparing means may comprise a first comparator. The second comparing means may comprise phase-detection means arranged to compare the phase of the output from the first comparing means with the phase of the signal provided to the sensor.
Preferably the error detection means is arranged in use to detect a high conductivity error condition or a low conductivity error condition at the sensor.
The error detection device may comprise a second comparator.
The output of the circuit may be arranged to drive a relay.
Preferred embodiments of the present invention will now be described by way of example only with reference to the accompanying diagrammatic drawings in which;
Figure 1 shows, schematically, an electrical circuit/ for use in a fail-safe system according to a first erabodiraent of the present invention, and
Figure 2 shows an electrical circuit, for use in a fail¬safe system according to a second embodiment of the present invention.

Referring to Figure 1, this shows generally a circuit for controlling a fail-safe operation of measurement and control apparatus (not shown) such as is used in a steam raising plant to monitor the water level in a steam generation vessel. A sensor 10 comprises an electrode which in use is inserted into a water/steam column {not shown) to detect the presence or absence of water. Typical applications of such apparatus include low or high level alarms on steam drums, feed heaters, deprecators and turbine water induction prevention systems on steam lines.
The apparatus detects the presence or absence of water by making a raeasurement of the impedance experienced in a gap between an insulated tip of the electrode and a surface held at a reference voltage or else connected to ground. The impedance measured when water is present is considerably less than that measured when water is absent. The apparatus may be configured to provide an alarm when water is present and should not be, or vice versa.
Broadly, the circuit comprises comparators ICl and IC2, a phase detector IC3 and a triple-redundant drive circuit 12 which drives a relay 14.
The function of ICl is to ensure that when operating with water as the normal condition, an electrode fault, such as could be caused by excessive contamination, will cause the system output to indicate an abnormal condition.
The main function of IC2 is to discriminate between the water condition and the steam condition.
The function of IC3 is to ensure that there is no output if there exists an abnormal condition or any fault condition. It follows that there will only be an output if the sensor is in the normal condition. This is then shown to operate a relay using a secure triple redundancy

drive circuit so that the relay contacts may be used to indicate a normal or an abnormal/fault condition.
The circuit will now be described in more detail with consideration first being given to the arrangement where the presence of water at the electrode is selected as the normal condition. It follows that it is necessary for the output to indicate an abnormal condition if steam is present or if there is any fault condition. For such an arrangement, the selector links LI and L3 are open and link L2 is shorted.
The electrode 10 is driven by a low frequency square wave (clock) ,signal 16 via resistance Rl. The electrode forms a potential divider with Rl, the amplitude of the signal returned via R2 being dependent upon the resistance of the electrode 10, ICl is a comparator which acts as an electrode fault detector and which receives at its inverting input, the signal from R2. This is compared to the voltage level at the non-inverting input as formed by the potential divider R3 and R4 such that, if the signal from R2 is less than that at the non-inverting input, the output from ICl is at a high state. Such a condition results if the wire from the electrode is broken, shorted to ground or if the conductivity is less than lOOμS/cm, the threshold level of the comparator ICl, as would be caused by a contaminated or faulty electrode. With no faults present, the output of ICl is an alternating signal which when applied to the gate of a transistor TRl, switches current through resistors R6 and R7. The resultant signal at the non-inverting input to IC2 is in phase with the clock 15 and has a maximum level as defined by the ratio of R6 and R7. The inverting input of IC2 receives the electrode signal via R2 and this also is in phase with clock 16. The maximum signal level at the non-inverting input to IC2 is set so that, for a water condition, there will be an alternating signal at the

output of IC2 which is in phase with the clock 16. When electrode 10 is immersed in steam the signal at the inverting input to IC2 will always be more positive than the signal on the non-inverting input since the impedance of the electrode 10 will be higher. In consequence there will be no alternating output from IC2.
If ICl should fail in a manner which causes no current to flow through R6 and R7, it places the non-inverting input to IC2 at the negative rail voltage and thus prevents IC2 from outputting a signal. If ICl should fail in a manner which causes current to flow through R6 and R7, it places the non-inverting input to IC2 at the water/steam threshold voltage. It follows that under water conditions, IC2 will give no output and under steam conditions, an alternating output which is out of phase with the clock 16. If IC2 should fail, its output will go to either a high or low d.c. state. All of the above mentioned output conditions cause IC3 to give no output which is indicative of an abnormal or fault condition.
IC3 is a D Type flip flop circuit with positive edge trigger. It receives the output from IC2 on its D input and the inverted clock signal from inverter IC4 on its clock input. The output from IC2 is also used as the reset signal. Both the D input and the clock input are derived from clock 16, however the switching of the D input is slightly delayed with respect to the clock input due to its passage through the electrode circuit and IC1/IC2, In consequence, it is only when these signals are out of phase that the output of IC3 changes. It is then reset half a cycle later to give an alternating output from IC3. It follows that if the input signals are in phase or if there is no signal on either of these inputs, the output will not be alternating.

The relay drive circuit 12 uses an a. c.. detector to drive the relay. The a.c. signal from IC3 will, on its positive cycle, charge the capacitor C1 through Dl and will also switch the transistors 18 to energise the relay 14. During the negative cycle these transistors will remain on due to the stored energy in capacitor C1. The size of C1 is chosen such that, if the a.c, signal ceases, the relay will be de-energized within five clock cycles. The three charging capacitors in series with Dl and the three transistor drive circuits are used to provide triple redundancy to achieve a secure relay drive arrangement. Thus the system indicates a normal condition if water is present and there are no faults and an abnormal condition if steam, is present and/or there is a fault.
Consideration is now given to the arrangement where the presence of steam at the electrode is selected as the normal condition. It follows that it is necessary for the output to indicate an abnormal condition if water is present or if there is any fault condition. For such an arrangement, the selector links LI and L3 are shorted and link L2 is open.
With L3 shorted, ICl serves no function in the circuit and the non-inverting input to IC2 is set to a d.c. threshold level for the switching from steam to water. Only in the steam condition is the signal from R2, which is applied to the inverting input of IC2, of sufficient value to cause IC2 to output a signal which is ant phase with the clock 16. In all other conditions, which include open or short circuits in the electrode 10, contamination of the electrode ox failure of IC2, cause 1C2 to go either to a high or a low d.c. state.
The output from IC2, which in the normal steam conditions is a signal in antiphase with clock 16, is applied to IC3 which in this configuration receives its clock signal

direct from clock 16 via L1- Since these two signals are antiphase, IC3 outputs an a.c. signal which in turn drives the relay to indicate the normal condition. If the electrode is in water or there is any fault condition the relay outputs an abnormal condition.
In Figure 2 an alternative arrangement is shown in which the circuit is simplified by the removal of one comparator circuit (i.e. ICl of the circuit of Figure 1) and then the resultant circuit is duplicated. In this manner the upper circuit 20 is used primarily to detect the water/steam status and the lower circuit 30 is used primarily to detect an electrode failure condition as results if the electrode is indicating a conductivity of less than lOOμS/cm. This difference being defined by selection of the resistive values of R8, R9, RIO and Rll. Each circuit will indicate an abnormal condition if there is a component failure within its circuit, but only the upper circuit 20 will indicate an abnormal condition if the water or steam status changes into the abnormal condition. The clock 16 is common to both upper and lower circuits 20, 30. In order to provide a fail-safe condition in the event of any fault or abnormal condition, the contacts [not shown) of the relays 14a and 14b, of the upper and lower circuits 20 and 30 respectively, must be connected together.
Although this arrangement uses more components in total, it does provide an operator with the additional information as to whether an abnormal indication is likely to be due to a component failure or to a change from a normal operating condition to an abnormal operating condition, whilst at the same time always providing a fail-safe operation.


WE CLAIM :
1. An electrical sensor circuit, the circuit comprising:
means (16, Rl) arranged to supply to a sensor (10) an alternating electrical signal to be attenuated at the sensor (10) in accordance with a condition
sensed by the sensor (10);
an output stage (12) arranged to indicate either a normal condition or a fault condition;
an error detector (R3, R4, IC 1) arranged to receive the attenuated signal and to cause the output stage (12) of the circuit to indicate a fault condition if the error detector (R3, R4, IC I) detects an open circuit or short circuit at the sensor (10); and
first comparing means (IC2, R6, R7) arranged to receive the attenuated signal and compare a value of the attenuated signal with a reference value, and to cause the output stage (12) to indicate a fault condition if the value of the attenuated signal is indicative of an abnormal condition at the sensor (10), wherein the first comparing means (IC2, R6, R7) is arranged to provide an alternating output signal having a predetermined phase relative to the attenuated signal when the attenuated signal is indicative of a sensed normal condition; and by selecting means {L 1, L2, L3) arranged to enable selection between a plurality of alternatives of the nature of the abnormal condition determined by the first comparing means (IC2), by setting the said reference value and a predetermined normal phase relation between the first comparing means output signal and the alternating electrical signal; and second phase comparing means (1C3, 1C4) arranged to receive the output signal from the first comparing means (IC2, R5, R7) and the alternating electrical signal supplied to the sensor (10), and to cause the output stage (12) to indicate a fault condition if the result of the phase comparison fails to indicate the predetermined normal phase relation between the first comparing means output signal and the alternating electrical signal.

2. The circuit as claimed in claim I, wherein the output stage (12) is arranged to drive a control device (14) which has a normal condition and a fault condition, such that the condition adopted by the control device (14) corresponds to the condition indicated by the output stage (12).
3. The circuit as claimed in claim 1 or claim 2, wherein the output stage (12) comprises a triple redundant switching means (18) for driving the control device (14), and the switching means comprises three switches, each of which is capable alone of switching the control device (14) to a fauh condition.
4. The circuit as claimed in anyone of claims 1 to 3, wherein the alternating electrical signal supplied to the sensor (10) is of a substantially low frequency and is of a substantially square wave form.
5. The circuit as claimed in claim 4, wherein the alternating electrical signal comprises a clock signal.
6. The circuit as claimed in anyone of claims 1 to 5, wherein the said condition
sensed by the sensor (10) is the impedance of the sensor (10).
7. The circuit as claimed in claim 6, wherein the selecting means (L 1, L2, L3) is arranged to select between a high sensed impedance and a low sensed impedance as the abnormal condition.
8. The circuit as claimed in anyone of claims 1 to 7, wherein the first comparing
means includes a first comparator (IC2).
9. The circuit as claimed in anyone of claims 1 to 8, wherein the error detector
(R3, R4, IC1) is arranged in use to detect a high conductivity error condition or a low
conductivity error condition at the sensor (10).

10. The circuit as claimed in anyone of claims 1 to 9, wherein the error detector
includes a second comparator (ICl).
11. The circuit as claimed in claim 2, wherein the control device comprises at least
one relay (14).

Documents:

1428-mas-1998 abstract.pdf

1428-mas-1998 claims-duplicate.pdf

1428-mas-1998 claims.pdf

1428-mas-1998 correspondence-others.pdf

1428-mas-1998 correspondence-po.pdf

1428-mas-1998 description (complete)-duplicate.pdf

1428-mas-1998 description (complete).pdf

1428-mas-1998 form-1.pdf

1428-mas-1998 form-13.pdf

1428-mas-1998 form-19.pdf

1428-mas-1998 form-26.pdf

1428-mas-1998 form-4.pdf

1428-mas-1998 form-6.pdf

1428-mas-1998 other-document.pdf

1428-mas-1998 others.pdf

1428-mas-1998 petition.pdf


Patent Number 217240
Indian Patent Application Number 1428/MAS/1998
PG Journal Number 21/2008
Publication Date 23-May-2008
Grant Date 26-Mar-2008
Date of Filing 26-Jun-1998
Name of Patentee SOLARTRON MOBREY LIMITED
Applicant Address BYRON HOUSE, CAMBRIDGE BUSINESS PARK, CAMBRIDGE CB4 4WZ,
Inventors:
# Inventor's Name Inventor's Address
1 PAUL NIGEL RICHARDS 7 HERITAGE PARK, BASINGSTOKE, HAMPSHIRE RG22 4XT,
PCT International Classification Number G01D 1/18
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 UK 9713678.2 1997-06-27 U.K.