Title of Invention | "AN IMPROVED BACK-TO-BACK TEST CIRCUIT FOR HIGH VOLTAGE DIRECT CURRENT (HVDC) THYRISTOR VALVE" |
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Abstract | An improved back-to-back test circuit for high voltage direct current thyristor valve comprising a six pulse back-to--back test circuit having a six thyristor valve (7) connected to a converter transformer receiving power from a generator, said valve is connected to a valve for short circuit testing through two parallel smoothing reactor , said valve for short circuit testing is connected to a converter transformer receiving power from said generator through a current limiting reactor characterized in that an impulse generator is connected for VBO triggering to the level near to the ground in one of the valve of the bottom commutating group said impulse generator circuit comprises a transformer connected to a diode, a thyristor and an inductor in series with a capacitor in parallel connected between said diode and thyristor. |
Full Text | The invention relates to an improved back-to-back test circuit for high voltage direct current (HVDC) thyristor valve used in transmission system. HVDC thyristor valve consists of a number of high voltage and high power thyristors connected in series. Most of the valves, in operation today, are air insulated, fibre optically triggered and water cooled. Thyristor valve experiences complex voltage and current stresses during normal and abnormal operating condition. We refer to the publication - CIGRE WG 14.01 report "Voltage and Current Stresses on HVDC Valves", Electra No. 125, July 1989, pp. 57-88. The standards IEC-700 "Testing of Semiconductor Valves for High Voltage DC Power Transmission" and IEEE-857, "IEEE Guide on test Procedures for HVDC Thyristor Valves" address the type tests and production sample tests to be performed on HVDC thyristor valves. Economics pose problems in arriving at suitable test circuits for operational type tests. Thyristor valve is a key componentin HVDC transmission system. The suitable high voltage and high power test facilities required for thyristor valves pose economical problems. Back-to-back test circuit with scale down valve function is accepted as a most suitable test circuit for performing operational type test on thyristor modules. The protection features provided in the present day valve design includes the following: (a) Overvoltage (b) Excessive rate of rise of voltage during normal blocking as well as during recovery period. In some of the valve designs, these protections are provided in the thyristor electronics which is placed at the thyristor level potential and in some designs it is provided in the valve control which is at ground potential. In the first case, the individual thyristor is force triggered in the event overvoltage appear across it and in the later case, the total valve is force triggered in the event of one or more number of thyristor levels experiencing the overvoltage. The individual thyristor protection is superior because it covers the overvoltage condition arising out of failure of triggering system. In c-der to have higher availability of the valve, the valve design considers the voltage stresses appearing across the affected thyristor level due to voltage break over triggering and the level components are dimensioned so that the operation can continue until the next scheduled maintenance. The most acceptable is the back to back six-pulse bridge circuit. There are disadvantages associated with the present system of back-to-back six pulse bridge circuit for test of high voltage DC thyristor valve. The main disadvantage is that the scale down valve functions are used in the arm of the six pulse bridges of the back-to back test circuit. As the valve function uses reduced number of thyristor levels, the test circuit parameters are to be scaled down in proportion to the ratio of number of devices in test circuit to the actual number of devices in service condition. However, this scaling is not applicable when the thyristor level is forced triggered by the local overvoltage protection. Therefore the main object of the present invention is to provide for an improved back-to-back test circuit for HVDC thyristor valve which does not require large number of thyristors in the valve function of the test circuit to obtain close to service condition stresses and avoid uneconomical large rating test station. Another object of the present invention is to provide for an improved back-to back test circuit for HVDC thyristor valve which uses an impulse generator to simulate the required stresses and it is easy and cheaper to rig up the impulse generator circuit. Yet another object of the present invention is to provide for an improved back-to-back test circuit for HVDC thyristor valve which is straight forward and does not require change in the circuit parameters of conventional set up. Further object of the present invention is to provide for an improved back-to-back test circuit for HVDC thyristor valve where the generator parameters can be adjusted to the required impulse waveshape and the same impulse generator circuit can be used with the suitable circuit component parameters, for carrying out switching impulse test during recovery period. According to this invention there is provided an improved back-to-back test circuit for high voltage direct current (HVDC) thyristor valve comprising a six pulse back-to-back test circuit having a six thyristor level valve connected to a converter transformer receiving power from a generator said valve is connected to a v.iive for short circuit through two parallel smoothing reactor said valve for short circuit testing is connected to a converter transformer receiving power from said generator through a current limiting reactor characterized in that an impulse generator is connected for voltage break over triggering to the level near to the ground in one of the valve of the bottom commutating group said impulse generator circuit comprises a transformer connected to a diode, a thyristor and an inductor in series with a capacitor in parallel connected between said diode and thyristor. The nature of the invention, its objective and further advantage residing in the same will be apparent from the following description made with reference to non-limiting exemplary embodiments of the invention represented in the accompanying drawings. Figure 1 shows the six pulse back-to-back test circuit according to priior art. Figure 2a shows graphically valtage break over triggering in rectifier mode. Figure 2b shows graphically voltage break over triggering in inverter mode Figure 3a shows graphically the thyristor current Figure 3b shows graphically the snubber current Figure 3c shows graphically the snubber capacitor voltage Figure 3d shows graphically the snubber energy loss Figure 4 shows the three phase bridge test circuit Figure 5 shows graphically the VBO simulation in conventional back-to-back circuit Figure 6 shows the modified six pulse back-to-back test circuit according to the invention. Figure 7 shows the details of the impulse generator circuit according to the invention to be used during operational testing to simulate VBO triggering Summary of the Present Invention Presently the operational type tests are performed on thyristor modules to verify the design of the valve regarding its performance under normal and fault conditions. The following tests are generally carried out as per the standards IEC 700 and IEEE-857 (i) Heat run, Periodic firing & extinction Test and temperature rise test. (ii) Minimum AC voltage test (iii) Intermittent direct current test (iv) Short circuit test with subsequent blocking voltage (v) Short circuit test without subsequent blocking voltage (vi) Switching impulse test during recovery period. The bridge circuits or synthetic test circuits are used to perform the above tests. The bridge circuits are of two types. One circuit consists of two six pulse bridges connected via smoothing reactor where one bridge operates in rectifieer and the other in inverter mode. The six pulse back-to-back circuit (1) presently being used is shown in Figure 1. The circuit comprises a power supply from an AC generator (3) with an AC filter (4) connected to an earth ( 10) and supplying power to a valve (7) and valve for short circuit testing (8) through a current limiting reactor (5) and two converter transformer (6) each for the valve (7) and valve for short circuit testing (8) respectively. The two six pulse briedges are connected through a pair of smoothing reactor (9) in parallel. Figure 2a shows graphically the VBO trigerring in rectifier mode the thyristor voltage in (KV) against Time in/^s and Figure 2(b) in inverter mode. Figures 3(a) and 3(b) shows the thyristor and snubber current respectively in ampere against Time (µs). Figure ( 3c) shows the snubber - capacitor voltage in KV against Time (µs) and Figure 3(d) shows the snubber energy loss in terms of Energy (J) against Time (µs). The Figures 3(a) to 3(d) represents stresses during VBO triggering in service condition. Thus the present test circuit comprises two six pulse bridges as in Figure 1. Another circuit as shown in Figure 4 comprises only one six pulse bridge where one commutating group operates in rectifier mode and another in inverter mode. The three phase bridge test circuit of Figure 4 comprises the generator (3) for power supply connected to a converter transformer (6) through an AC filter (4) and a current limiting reactor (5). The converter transformer (6) is connected to a valve (7a) and valve for short circuit testings (8a) and smoothing reactor (9) is connected across the bridge. The VBO simulation in conventional back-to-back circuit is shown graphically in Figure 5 which indicates the VBO trigger level in voltage (KV) against Time (ms). The present invention of an improved back-to-back test circuit is represented in Figures 6 and 7. The modified six pulse back-to-back test circuit comprises the test circuit as disclosed in Figure 1 of the prior art. The improvement is the addition of an Impulse Generator for VBO Triggering (2) the detail of the impulse generator (2) circuit used during the operational testing to simulate VBO triggering is shown in Figure 7. The impulse generator circuit (2) comprises a transformer (11) connected to a diode (12) and a thyristor (13) in series with an Inductor (14) and a capacitor (15) connected in parallel between the diode ( 12) and thyristor (13). Three resistors (16) are provided suitably in the circuit as shown.The impulse generator parameters vary with the valve impedance. The stresses during VBO triggering in modified back-toback test circuit is shown in Figures 8(a), 8(b) and 8(c) represented graphically. The voltage and current of thyristor is shown graphically in Figure 8(a) with voltage in (KV) and current in (KA) is charted against Time ('W\-s) .The snubber current is shown graphically with current in Ampere against Time in s and the Snubber energy loss is shown as Energy in Jules against Time invns. Detailed Description of the Invention The proposed invention relates to an improved back-to best test circuit which uses an impulse generator. The proposed test circuit is simulated using EMTP and the results are compared with those of service conditions. The results show close agreement. The improved test circuit is easy to implement and it does not call for modification of test plant parameters to simulate such abnormal condition. Thyristor valve turns ON as soon as firing pulses to the series connected thyristors are available from valve control. The firing signals in the form of light are sent through fibre optical cables from valve control to thyristor gate circuit. The light signal is converted into electrical signal and gate pulse is issued to the concerned thyristor. For direct light triggered thyristors, the conversion of light signal to electrical signal is not required. All series connected thyristors in a single valve may not turn-on simultaneously due to inherent variation in gate circuit component characteristics and turn-on-delay time of the individual thyristors. The thyristor level which turns-on last will experience additional voltage and current stresses as compared to the average thyristor. Such turn-on studies are carried out in reference G.Karady, T. Gilsig.The calculation of Turn-on Overvoltages in HVDC Thyristor Valve," IEEE Trans.PAS-90, No.6, Nov./Dec.1971,pp.2802-2811.However, these stresses are not severe as the spread in turn-on time of the thyristors is very small. Thyristor valves of present day design are generally provided with over voltage, dv/dt and recovery protections. The over voltage protetion circuit protects the valve when a thyristor does not receive a normal gate pulse due to failure of triggering system. Under such condition, the affected thyristor level will experience a high voltage stress. The affected thyristor turns-on as soon as the level voltage exceeds the pre-determined VBO level set in the level electronics. A 12-pulse HVDC scheme consisting of 96 thyristor levels per valve function is considered to study VBO turn-on. These studies are carried out for both rectifier and inverter operation. Under normal operation, the average thyristor level voltage, at turn-on instant, is less in rectifier operation as compared to the inverter operation. Due to this reason, the VBO level reaches faster in inverter operation than in rectifier operation as shown in Fig. 2. The stresses during VBO triggering on the components of the affected level are shown in Fig-3 for rectifier operation. The test circuit comprising two six pulse bridges are generally used and is considered for the present invention. However, the improved test circuit proposed in the invention is equally applicable for the other bridge circuit having only one six pulse bridge. The number of thyristor levels considered per single valve function in a bridge circuit are few due to limitation on rating of test facility and accordingly the commutating voltage, inductance & smoothing reactance are scaled down. The conventional back-to-back test circuit, when VBO firing is simulated during "Periodic Firing and Extinction Test" without suitably modifying the plant parameters, will impose turn-on stress much different from service condition. Across the affected level, the time taken to reach VBO level is much larger and dv/dt stress is much smaller. This is explained in Fig. 5 considering 3 thyristor levels per valve function as against 96 in the service condition for rectifier operation. This indicates that the VBO firing stresses can not be achieved during operational tests using existing bridge circuit without making suitable modifications. This leads to the question on keeping adequate thyristor levels per valve function during operational testing. More than 10 thyristor levels per valve function or suitable modification in the test circuit to demonstrate VBO firing is required. If thyristor levels per valve function are less than 10, supplementary test shall be performed to simulate VBO firing. The improved test circuit is shown in Fig. 6. The VBO triggering is simulated in the level near to the ground in one of the valve (7) functions of the bottom commutating group as shown in Fis. 6. An impulse generator (2) is connected to this level. VBO triggering is simulated by disconnecting the optical cable connection to the thyristor level under study. At the instant when the triggering command is issued to the valve (7) function under study the impulse generator (2) is also triggered. Fig. 7 shows impulse generator circuit (2) arrangement. Fig. 8 ( a, b and c) shows the voltage and current stresses accros the VBO triggered level with improved bridge circuit. These are compared with the stresses estimated during complete valve and bridge circuit prior to modification in Table - 1. The improved test circuit proposed in this invention is straight forward and does not require change in the circuit parameters of conventional test setup. The required VBO stresses are simulated with the addition of a small impulse generator. The arrangement does not call for large number of thyristor levels which avoid uneconomical large rating test station. It is easy and cheaper to rig - up impulse generator circuit. The generator parameters can be adjusted to the required impulse waveshape.The same impulse generator circuit can be used, with the suitable circuit component prameters, for carrying out switching impulse test during recovery period. TABLE-I A COMPARISON OF VBO FIRING STRESSES (Table Removed) The invention described hereinabove is in relation to non - limiting embodiments and as defined by the accompanying claims. WE CLAIM: 1. An improved back-to-back test circuit for high voltage direct current (HVDC) thyristor valve comprising a six pulse back-to-back test circuit (1) having a six thyristor level valve (7) connected to a converter transformer (6) receiving power from a generator (3) said valve (7) is connected to a valve (8) for short circuit through two parallel smoothing reactor (9) said valve (8) for short circuit testing is connected to a converter transformer (6) receiving power from said generator (3) through a current limiting reactor (5) characterized in that an impulse generator (2) is connected for voltage break over triggering to the level near to the ground in one of the valve (7) of the bottom commutating group said impulse generator (2) circuit comprises a transformer (11) connected to a diode (12), a thyristor (13) and an inductor (14) in series with a capacitor (15) in parallel connected between said diode (12) and thyristor (13). 2. An improved back-to-back test circuit as claimed in claim 1 wherein the number of thyristors per valve (7, 8) is three each. 3. An improved back-to-back test circuit as claimed in claim 1 wherein the voltage across the valve (7, 8) is 10.4 KV and corresponding control angle is 15 and ignition voltage of 2.7 KV with voltage break over level of 6.5 KV. 4. An improved back-to-back test circuit as claimed in claim 3 wherein the time to reach said VBO level is 160 us close to service condition value of 90us. 5. An improved back-to-back test circuit as claimed in claim 1 wherein the Generator (3) is connected to Earth (10) through the AC filter (4) having a capacitor and a resistor. 6. An improved back-to-back test circuit as claimed in claim 1 wherein a resistor (16) each is connected in series before and after the said diode (12), said thyristor (13) and said inductor (14) circuit in series. 7. An improved back-to-back test circuit as claimed in any one of the preceding claims wherein a third resistor (16) is connected in parallel across the diode (12), thyristor (13) and inductor (14) circuit. 8. An improved back-to-back test circuit for high voltage direct current thyristor valve as herein described and illustrated in the accompanying drawings. |
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1204-del-1999-correspondence-others.pdf
1204-del-1999-correspondence-po.pdf
1204-del-1999-description (complete).pdf
1204-del-1999-petition-others.pdf
Patent Number | 221635 | |||||||||
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Indian Patent Application Number | 1204/DEL/1999 | |||||||||
PG Journal Number | 31/2008 | |||||||||
Publication Date | 01-Aug-2008 | |||||||||
Grant Date | 30-Jun-2008 | |||||||||
Date of Filing | 09-Sep-1999 | |||||||||
Name of Patentee | BHARAT HEAVY ELECTRICALS LTD, | |||||||||
Applicant Address | BHEL HOUSE SIRI FORT ,NEW DELHI - 110 049,INDIA | |||||||||
Inventors:
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PCT International Classification Number | G01R 31/333 | |||||||||
PCT International Application Number | N/A | |||||||||
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