Title of Invention

A PROCESS OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD

Abstract This invention relates to a process of manufacturing multilayer printed wiring boards comprising: -building multilayer mono-block of standard copper clad laminate having a desired pattern on both sides by sequentially adding dielectric layers by means of gasket printing, -drilling THROUGH AND THROUGH holes in the said monoblock at predetermined locations, -metalizing top and bottom layers and also the said holes in a single step elctroless copper plating to form THROUGH AND THROUGH, BLIND AND BURRIED vias through the pads in the said desired pattern, -transferring the required image pattern on the top and bottom layer by conventional image processing technique to form the desired multilayer printed board.
Full Text This invention relates to a process of manufacturing multilayer printed wiring boards.
BACKGROUND
Multilayer printed wiring boards is an important component in Jig density electronics packaging. It is estimated that about 33% of the wiring board produced globally are of multilayers construction; while 62% of the boards are double sided boards and rest 5% are boards of different configuration.
The technology of producing multilayer wiring boards is essentially stacking separately prepared double sided boards along with prepreg material and converting the stock to a multilayer mono-block by curing under pressure and heat. With this process steps stack containing as many as 50 layers have been produced, although 8 to 10 layers stack is a very common requirement. This technology is costly and requires:
high investment on capital equipment such as laminating press, high capacity PTH (plating through holes) process line, X-ray registration system, Peck drilling machine for BLIND vias and the like.
long duty cycle in the laminating press
drift in pad locations during hot pressing
need for very tight process control
difficulty in Peck drilling
difficulty in plating BLIND vias
BURRIED vias adding to very high cost
large number of process steps

Therefore there is need to develop a process which is cost effective and less cumbersome.
The object of this invention is therefore to make THROUGH AND THROUGH, BLFNFD, AND BURRIED vias in the multilayers mono-block of standard copper clad laminate having a standard pattern on both sides.
The second object of the invention is to eliminate the use of prepreg material and curing the multilayer mono-block under pressure and heat.
The third object of the invention is to make the process economical by dispensing with capital equipment such as Peck drilling machine. X-ray registration system and the like.
To achieve the said objectives this invention provides a process of manufacturing multilayer printed wiring boards comprising :
building multilayer mono-block of standard copper clad laminate having a desired pattern on both sides by sequentially adding di¬electric layers by means of gasket printing,
drilling THROUGH AND THROUGH holes in the said mono-block at predetermined locations,
metalizing the top and bottom layers as well as metalizing said holes in a single step elctroless copper plating to form THROUGH AND THROUGH, BLIND AND BURRIED vias through the pads in the said desired pattern,

transferring the required image pattern on the top and bottom layer oy conventional image processing technique to form the desired multi layer printed board. The dielectric layer is formed from an liquid epoxy resin and the step of gasket printing comprises taking liquid epoxy resin, adding filler material such as random glass fibers, woven glass cloth, graphite fiber / graphite cloth or ceramic paste containing ferro electric barium titonate powder and glass powder in the said resin to get thixotropic material which is highly viscous, placing a stainless steel gasket over the laminate and applying the said thixotropic material in the opening of the said gasket and curing.
The thickness of thixotropic material varies from 100-400 microns to provide insulation between the multilayers of mono-black.
The preferred embodiments according to this invention will now be described with reference to the accompanying drawings:
Figs 1 to 6 shows the steps of formation of a mono block of 4 layers
Fig 1 shows the double side laminate quoted with copper
Fig 2 shows double side laminate witfi desired pattern.
Fig 3 shows the insulating layer add^d to the said double sided laminate of fig 2 to create a mono block
Fig 4 shows the drilling of the block THROUGH AND THROUGH vias. Fig 5 shows the metalized multilayer mono block.

Fig 6 shows the desired multilayerd printed layers of 4 layers having
THROUGH AND THROUGH BLIND AND BURRTED vias according to this
invention.
Figs 7 to 13 show the steps of forming second embodiment of the invention
showing a mono-block of 6 layers.
Fig. 7 show metal layers provided on the insulated layer of the block shown in figure 3.
Fig 8 shows the pattern on the metalized to and bottom layer formed on the insulated layer of block
Fig 9 shows a the step of forming desired pattern on the metalized layer
Figure 10 shows the step of gasket printing
Figure 11 shows the step of drilling holes
Figure 12 shows the step of metalizing holes and the layers
Figure 13 shows the monoblock of 6 layers with THROUGH AND THROUGH vias, BLIND vias and BURRIED vias
Referring to figures 1 to 6, the epoxy substrate (1) having copper coatings (2) on both sides of the said substrate to form double sided laminate. In fig 2 the desired pattern (3) is formed on said copper layers (2) by conventional image forming technique. Pattern (3) is insulated on both the sides by gasket printing and curing. In Fig 5 metalized layers are formed on the top and bottom of the said insulated layers followed by plating through holes, at pre-determined

locations by electroless copper deposition process. In fig 6 THROUGH AND THROUGH vias (5), BLIND vias (7) and BURIED vias (6) are formed in the said mono-block.
Figure 8 shows the metalized layer (Ml & M2) formed on the insulated layer of block (3). In fig. 9, a desired pattern is formed on the metalized layer (Ml & M2) and in figure 13, the mono-block of 6 layers is shown with THROUGH AND THROUGH vias (5), BLIND vias (7) and BURRIED vias (6).
Similarly, a mono-block of 8 or any number of layers can be formed.
It may thus be seen that the instant process avoids Peck drilling for BLIND vias. It also avoids the formation of BURIED vias by taking concerned laminates separately and processing them for the formation of BURRIED vias.


We Claim:
1. A process of manufacturing multilayer printed wiring boards
comprising:
- building multilayer mono block of standard copper clad laminate having a desired pattern on both sides by sequentially adding di- electric layers by means of gasket printing,
- drilling THROUGH AND THROUGH holes in the said mono- block at predetermined locations!
- moralizing top and bottom layers and also the said holes in a ■ single step elctroless copper plating to form THROUGH AND THROUGH, BLIND AND BURRIED vias through the pads
in the said desired pattern,
- transferring the required image pattern on the top and bottom
layer by conventional image processing technique to form the
desired multilayer printed board.
2. A process of manufacturing multilayered printed wiring board as claimed in claim 1, wherein the di-electric layer is formed from a liquid epoxy resin
3. A process of manufacturing multilayered printed wiring board as claimed in claim 1, wherein the step of gasket printing comprising taking liquid epoxy resin, adding filler material as herein defined in the said resin to get thixotropic material which is highly viscous, placing a stainless steel gasket over the

laminate and applying the said thixotropic material in the opening of the said gasket and curing.
4. A process of manufacturing multilayered printed wiring board as claimed
in claim 3, wherein the thickness of thixotropic material varies from 100-
400 microns to provide insulation between the multilayers of mono-
block.
5. A process of manufacturing multilayered printed wiring board
substantially as herein described with reference to and as illustrated in the
accompanying drawings.

Documents:

2518-mas-1998 abstract-duplicate.pdf

2518-mas-1998 abstract.pdf

2518-mas-1998 claims-duplicate.pdf

2518-mas-1998 claims.pdf

2518-mas-1998 correspondence-others.pdf

2518-mas-1998 correspondence-po.pdf

2518-mas-1998 description (complete)-duplicate.pdf

2518-mas-1998 description (complete).pdf

2518-mas-1998 drawings.pdf

2518-mas-1998 form-1.pdf

2518-mas-1998 form-13.pdf

2518-mas-1998 form-19.pdf

2518-mas-1998 form-26.pdf


Patent Number 221682
Indian Patent Application Number 2518/MAS/1998
PG Journal Number 37/2008
Publication Date 12-Sep-2008
Grant Date 01-Jul-2008
Date of Filing 06-Nov-1998
Name of Patentee INDIAN INSTITUTE OF SCIENCE
Applicant Address CENTRE FOR ELECTRONICS, DESIGN AND TECHNOLOGY, BANGALORE 560 012,
Inventors:
# Inventor's Name Inventor's Address
1 DR. GUNDU ANANDA RAO INDIAN INSTITUTE OF SCIENCE, CENTRE FOR ELECTRONICS, DESIGN AND TECHNOLOGY, BANGALORE 560 012,
2 CHINNAPPAN ANTONISWAMY INDIAN INSTITUTE OF SCIENCE, CENTRE FOR ELECTRONICS, DESIGN AND TECHNOLOGY, BANGALORE 560 012,
PCT International Classification Number B 23 B 15/04
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 NA