Title of Invention | PROCESS FOR PRODUCING A PLASMA-DEPOSITED MUTI JUNCTION AMORPHOUS SILICON SOLAR CELL DEVICE |
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Abstract | A process for producing a plasma-deposited multi junction solar cell device called an amorphous silicon solar cell module comprising: a plurality of plasma deposited amorphous silicon solar cels consisting of: a transparent sheet glass plate coated with a transparent conductive oxide (TCO) layer by an atmospheric pressure chemical vapour deposition method; a number of fine screen-printed lines and two wider bus bars of Ag frit on TCO and fired at a high temperature for forming metallic contact to each of the individual cells on the glass substrate; a sequence of seven amorphous silicon layers and one micro crystalline silicon layer deposited in a single chamber at elevated substrate temperatures, the process gases being diluted with hydrogen; an amorphous silicon carbide buffer layer with a graded band gap at the sensitive p/l interface produced by brief introduction of a carbon containing process gas such as methane and relying on the continuous vacuum pumping to produce the desired band gap grading; removing traces of dopant gas from the single deposition chamber by alternate purging with hydrogen gas and vacuum pumping; forming a microcrystalline silicon layer such that It form a recombination junction with the p layer of the next junction; carrying out series interconnection of cells in the module by firstly forming without breaking vacuum a back ohmic contact of sputtered silver film covering the entire module area and secondly removing the silver film from specific areas another screen printing and wet chemical etching so as to obtain the desired cell isolation and series interconnection of cells. |
Full Text | FIELD OF INVENTION: This invention relates to a process for producing a plasma-deposited multi junction amorphous silicon solar cell device herein after referred to as amorphous silicon solar cell module. BACKGROUND OF THE INVENTION. Thin film solar cell modules based on plasma deposited amorphous silicon (a-Sl) have the potential for generation of tow-cost photovoltaic power. Haled in eighties as one of the most promising thin film PV technologies, these devices have, so far, failed to realize this dream on account of their lower efficiencies compared to that for crystalline silicon. The relatively lower stabilized efficiencies for these devices has primarily been attributed to the so-called Staebler-Wronsky effect (SWE) according to which amorphous silicon material, by virtue of the nature of the defects in its lattice, loses photoconductivity on exposure to light. This results in degradation in electrical performance of solar cells and brings down their efficiency. Degradation due to SWE in plasma deposited a-Si has been reduced through invention of multi junction (double and triple junction) solar cell structures where the intrinsic silicon layer (i layer), which is responsible for absorbing incident solar radiation, is split into thinner layers, each serving as a separate absorber layer in the respective p-i-n junction configuration. The total layer thickness, however, remains the same as that in a single junction device. The reduction in SWE is brought about by the fact that thinner layers of intrinsic silicon give rise to stronger electrical field across the device and the electron-hole pairs generated on absorption of light are quickly separated. This prevents creation of additional defect sites in the material, which are generated from breaking of weak Si-Si bonds due to the energy liberated from recombination of electrons and holes. While this improvement in the device configuration reduces the extent of performance degradation in a-61 solar cells upon exposure to light, contamination of the intrinsic layer from any other source during the fabrication process lends to nultify the beneficial effect. In particular, contamination due to boron and phosphorus atoms of the i layer adversely affects the device performance. In conventional PECVD process, it is often found advantageous to deposit the doped (p and n) and the undoped (i) layers in separate deposition chambers so as to prevent contamination of the intrinsic layer with traces of dopant atoms. In fact, the superior performance of p-i-n or n-i-p type solar cels made in multi chamber deposition systems compared to those made in single chamber systems has been well documented in literature and text books [1-4]. The reason cited has been contamination of the highly sensitive intrinsic absorber layer with boron and phosphorus atoms sticking to the chamber walls and other mechanical parts inside the chamber, which act as a virtual source of these atoms. Notwithstanding the above, there have been attempts in the past by various research groups of making single Junction modules in the single deposition chamber. The Industry leaders, however, almost invariably use multi chamber deposition systems for improved module performance and process reliability. A number of treatments [5-10], essentially following the deposition of p layer and prior to the deposition of i layer, have been suggested by various research and industrial groups to reduce the boron concentration in the deposition chamber before the onset of the deposition of i layer. These treatments range from flushing the deposition chamber with hydrogen or argon [6], nitrogen trlfluoride [6], exposing the chamber interiors with a CO2 plasma [7,8], gas flushing and brief vacuuming [9], subjecting the chamber interiors to novel oxidation treatments such as water vapour and ammonia flush [10] and growing an adapted buffer layer with high hydrogen dilution between the p and the i layer [7]. Many of these treatments, e.g. exposing the chamber to CO2 plasma require the substrate to be taken out of the deposition chamber as it is likely to damage the highly vulnerable p/l interface [7]. Most of these treatments either relate to formation of devices with single p-i-n junctions and/or are Iimited to module areas not greater than 900 cm2. In an these studies, ultra high purity (UHP) process and dilution gases have been used in order to realize high-performance devices. This issue of single chamber deposition assumes much more significance in case of multi Junction devices made on targe areas as processing of these devices is much more complex than that for single junction devices. For double junction devices, the process involves sequential deposition of several (six to eight) thin a-Si layers, doped and undoped, under varying deposition conditions of temperature and pressure. The muti junction configurations used In some of the previous studies [9] have employed a-Si / μc-Si structures and most of the groups have TCO (Al doped ZnO) at the back junction for improved reflection and module performance. Though some groups mention triple laser-scribed, dry process for going from cell stage to module stage, there is no clear mention of the isolation and inter-connection method used by other groups. It n also well established that the usual method of series interconnecting individual cells in a monolithic module using sequential laser scribing of the TCO, a-Si and metal layers causes minimum toss of the active area, thereby enhancing the module current and efficiency [11]. However, it involves the use of expensive capital equipment - a laser scriber with dual wavelengths (0.53 and 1.06 micrometer) and a machine vision for maintaining exact paratileness of the scribed lines. Also the process is not free from problem areas such as controlling the depth of focus of the laser beam so as to account for small unevennese in the glass substrates and the reduced shunts caused by debris from laser scribing. Even gross non-uniformity in the haze of the underlying TCO film affects the laser scribing process. Another demerit of this method of interconnecting cells in a large area a-Si module is that it necessitates exposing the a-Si layers to atmosphere prior to metallization to enable laser scribing on it. This increases the chances of contamination of thin layers of vulnerable semiconductor surface and if not handled with utmost care, could deleteriously affect the module performance. Amorphous silicon solar cell technology has the benefit of using a number of inexpensive substrates such as glass, stainless steel and plastic (polyamide). Most of the commercially available modules are made on glass substrates, which is also the substrate commonly used in laboratories for research and development purposes. In all these laboratory as wed as commercial applications, float glass is invariably used as it has a very flat surface that ensures uniformity of thickness of a-Si Urns in the plasma deposition process and also facilitates falser scribing of all three layers for isolation as weH as inter- connection. OBJECTS OF THE INVENTION An object of this invention is to propose a process for producing a plasma- deposited multi junction amorphous silicon solar cell device. Another object of this invention is to propose a process for producing a plasma- deposited multi junction amorphous silicon solar ceN device wherein the doped and undoped hydrogenated amorphous and macrocrystalline silicon films are deposited in a single plasma deposition chamber. Still another object of this invention is to propose a process for producing a plasma-deposited multiI junction amorphous silicon solar cell device wherein sequential depositions are interspersed with alternate gas purging and high vacuum pumping. Further object of this invention is to propose a process for producing a plasma- deposited multi junction amorphous silicon solar cell device, which employs direct deposition of the metal layer on the amorphous silicon layer without breaking the vacuum and employing only one laser scribing coupled with a screen-printing and wet chemical etching for cell isolation and interconnection. Still further object of this invention is to propose a simple end cost-effective process for producing a plasma-deposited multi junction amorphous silicon solar cell device. BRIEF DESCRIPTION OF THE INVENTION: According to this invention there is provided a process for producing a plasma- deposited multi junction solar cell device comprising: A plurality of plasma-deposited amorphous silicon solar celts made with the following essential process steps. Providing a transparent sheet glass plate and coating it with a transparent conductive oxide (TCO) layer of fluorinated tin oxide (SnO2: F) by an atmospheric pressure chemical vapour deposition method; Screen printing a number of fine lines and two wider bus bars of Ag frit on TCO and fired at a high temperature for forming metallic contact to each of the individual cells on the glass substrate; Depositing seven amorphous silicon layers and one microcrystalitine silicon layer in a single plasma deposition chamber at elevated substrate temperatures, the process gases being diluted with hydrogen; Depositing a buffer layer at the sensitive p/i interface by introducing briefly a carbon containing process gas such as methane gas and relying on the continuous pumping of the gas to produce a silicon carbide layer with a graded band gap; Removing traces of the dopant gas from the single deposition chamber by alternate purging with hydrogen gas and vacuum pumping; Forming a microcrystalline silicon layer such that it forms a recombination junction with the player of the next junction; Carrying out series interconnection of cells in the module by firstly forming without breaking vacuum a back ohmic contact of sputtered silver film covering the entire module area and secondly removing the silver film from specific areas with another screen printing and wet chemical etching so as to obtain the desired cell isolation and series interconnection of cells. BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS: Figure 1 presents the process flow employed in fabrication of large area a-Si modules. Figure 2 depicts as-produced current-volage characteristics of a typical large area double junction amorphous sicon module. Figure 3 depicts the quantum efficiency of a typical large area (1 ft. X 3 ft.), a-Si double junction photovoltaic module. Figure 4 depicts the module output power plotted against serial number of modules in a continuous process run without chamber cleaning. Figure 5 shows the performance of a-Si double junction modules in batch production Figure 6 shows outdoor degradation data for large area (1' X 3'), double junction amorphous silicon solar cell modules. DETAILED DESCRIPTION OF THE INVENTION: In the present invention, a process is established for large area (1 ft. X 3 ft.), double junction a-Si solar cell modules where all the doped and undoped hydrogenated amorphous and microcrystalline silicon films are deposited by plasma enhanced chemical vapour deposition (PECVD) process in a single deposition chamber. The sequential depositions are interspersed with alernate gas purging and high vacuum pumping for short durations to reduce the level of boron contaminant to tolerable limits, which do not adversely affect the performance of the double junction modules. Referring to Fig.1, it is seen that in making a double junction a-Si module, a transparent sheet glass plate is first coated with a transparent conductive layer by an atmospheric pressure chemical vapour deposition (APCVD) process. Based on the design voltage of the module, a number of fine fines and two wider bus bars of Ag frit are screen printed on TCO and fired at a high temperature. These lines run parallel to the longer dimension of the module and their number depends on the design voltage and current of the module. An IR iaser is employed to scribe fine lines adjacent to each of the Ag frit lines, thus forming positive contact to each of the individual cells on the glass substrate. a) Aingle chamber a-Si deposition process: The deposition of amorphous silicon layer is carried out next by RF (13.56 MHz) PECVD of stone and the dopant gases diluted with hydrogen. The depositions are carried out in a single chamber at elevated substrate temperatures. The hydrogen gas used has a purity of far lower compared to the purity level of UHP hydrogen gas (99.999 %) normally used in such processes. The device structure used is: p a-SIC:H / a-SiC:H / i a-Si:H / n μC-Si / p a-SiC:H / a-SiC:H / i a-Si:H / n a-Si.H/Ag. b) Deposition of buffer layer with graded bandgap: An alloy of silicon and carbon (a-SiC:H) material with graded band gap is used at the sensitive p/i interface in order to reduce the gap states and improve the device performance in general and Voc in particular. A natural process of pumping gases from the deposition chamber resizes the band gap grading, which is essentially linked to the concentration of methane gas in the gas mixture. The benefit of graded band gap buffer layer in improving the module performance to shown in Table 1. c) Decontamination process: A few brief cycles of alternate purging of the chamber with inexpensive hydrogen gat and evacuation to high vacuum with a turbomoleculer pump ensures effective removal of dopant gases from the deposition chamber before deposition of the intrinsic (1) layer. d) Deposition of micro crystalline silicon layer: The n layer in the first junction is deposited as microcrystaine silicon film with low resistivity so that it forms a recombination junction with the p layer of the next junction. The microcrystaine silicon layer is formed by a combined effect of high RF power density and high hydrogen dilution of siline. The power applied is higher in the first few minutes of deposition after which it is reduced to 50-60% of the initial value. As shown in the table below, the microcrystaine silicon film formed this way shows a conductivity of 0.5 - 1.0 Scm-1 over the area of the substrate. Also the UHP (99.9995%) hydrogen used in the process has been replaced with less pure (99.9%) hydrogen with no deterioration of the results. The data in support of this is presented in Table 2. a) Formation of back ohmic contact, Isolation and series inter- connection of cells: The back ohmic contact for the device In the form of a sputtered Ag layer is deposited next without breaking vacuum. This, in our opinion, is very important since in the conventional laser scribing process, it is mandatory to break vacuum after deposition of a-Si layers to do laser scribing before loading it again in to vacuum chamber for metallization by DC magnetron sputtering of a layer of metallic silver. This layer, to begin with, covers the entire surface of the module, acting as a common back contact for all the cells in the module. This, therefore, needs to be removed from the desired places so as to obtain the desired series- interconnection. The series-interconnection, takes place through the printed and fired Ag frit lines. The removal or sputtered Ag layer from desired places is carried out by a combination of screen printing and wet chemical etching. Inexpensive acid resistant ink is used as the mask, which is applied by screen-printing. The acid- resist ink left at the printed areas forms a protective coating for the thin metal layer The resultant module has all the cells interconnected in series in such a way that the module voltage as measured by making contact on the two bus bars at the two ends is essentially an algebraic sum of the voltages of the individual cells. The module current, on the other hand, is that generated by an individual cell defined by the area between the two consecutive TCO scribes. f) a-Si modules on sheet glass substrates: Thin film modules are, in general, made on very flat surfaces, such as float glass, highly polished stainless steel or plastic foils. The high degree of flatness is required form the point of view of deposition of thin layers of amorphous and microcrystalline silicon as wed as laser scribing of these layers with the aim of series-interconnection of constituent cells. In the invention described above, the requirement of a very high degree of flatness is also obviated as the processes of screen-printing and chemical etching takes place with equal effectiveness on all kinds of surfaces. The initial laser scribing of TCO layer is not very critical compared to the scribing of a-Si and metal layers. Based on these facts, it is established that the above invention can also be used with equal effectiveness on good quality sheet glass substrates for large area, double junction solar cell modules. The experimental data in support of this are provided in Table 3. It can be seen that the results are very much consistent which substantiates our claim. Since sheet glass substrates are -40 % less expensive compared to float glass substrates, this also leads to substantial cost reduction. The invention described above has been successfully tried out on a large number of double junction amorphous silicon photovoltaic modules made on targe area (1 ft. X 3 ft.) glass substrates. As already mentioned above, these modules have the device configuration of glass/SnO2:F/p a-SiC/i a-SiC/i a-Si/n μc-Si/p a-SiC/i a- SiC/i a-Si/n a-Si/Ag. The intrinsic a-Si layers have the same band gap but different thickness for the two junctions. The current-voltage characteristic of a typical a-Si double junction module has been depicted in Fig. 2. The 30 cm width or the module has been divided into 14 equal segments, each representing a constituent cell and having an area of around 180 cm2. The success of the double junction process and the cell inter- connection scheme described in the foregoing is seen from fact that an open circuit voltage of 24.52 V corresponds to an average cell voltage of 1.75 V, which is normally expected out of a high-performance double junction a-Si cell with a buffer layer. The short-circuit current of 1.38 A, which corresponds to a current density of 7.6 mA/cm2, matches weH with the data obtained from the QE-A plot in Fig. 3. This can be improved further by employing different band gap materials such as a-Si and a-SIGe for absorber layer in the two junctions and a ZnO:AI back reflecting layer. There is, however, good current matching between the top and the bottom cell as has been depicted in the quantum efficiency plot of Fig. 3. The fill factor however is reasonable for a module of this size. This shows that the resistances at various interfaces including that at the n/p interface is quite low and that the series-interconnection scheme described above has been able to connect the constituent celts of a module in series without any loss of voltage. The reproducibility of the process over a long process run without any additional cleaning of the chamber is shown in Fig. 4. The process reliability and reproducibility is shown in Fig. 5 for a small batch of 28 modules. It can be seen that the more than 95% of the modules fall in the ± 2a range, which is an indicator for extremely good control over the overall process. The outdoor degradation behaviour of the modules fabricated with the above process is shown in Fig. 6. It is evident that the invented process is capable of producing large area, double junction a-Si solar cell modules that can provide stable power output in excess of 15 W, which corresponds to a stable, total area efficiency of around 5-55%. WE CLAIM; 1. A process for producing a plasma-deposited multi junction solar cell device called an amorphous silicon solar cell module comprising: a plurality of plasma deposited amorphous silicon solar cells consisting of: -a transparent sheet glass plate coated with a transparent conductive oxide (TCO) layer by an atmospheric pressure chemical vapour deposition method; -a number of fine screen-printed lines and two wider bus bars of Ag frit on TCO and fired at a high temperature for forming metallic contact to each of the individual cells on the glass substrate characterized in that the formation of interconnection of cells is feasible in situ and, -a sequence of seven amorphous silicon layers and one micro crystalline silicon layer deposited in a single chamber at elevated substrate temperatures,the process gases being diluted with hydrogen; -an amorphous silicon carbide buffer layer with a graded band gap at the sensitive p/i interface produced by brief introduction of a carbon containing process gas such as methane and relying on the continuous vacuum pumping to produce the desired band gap grading; -removing traces of dopant gas from the single deposition chamber by alternative purging with hydrogen gas and vacuum pumping; -forming a microcrystalline silicon layer such that it form a recombination junction with the p layer of the next junction; -carrying out series interconnection of cells in the module by firstly forming without breaking vacuum a back ohmic contact of sputtered silver film covering the entire module area and secondly removing the silver film from specific areas another screen printing and wet chemical etching so as to obtain the desired cell isolation and series interconnection of cells. 2. The process as claimed in claim 1, wherein said step of deposition of amorphous silicon layer is done by RF (13.56 MHz) PECVD of silicon. 3. The process as claimed in claim 1, wherein said buffer is an alloy of silicon and carbon (a-SiC:H). 4. The process as claimed in claim 1, wherein said microcrystalline silicon layer in the first junction comprises an n type layer. A process for producing a plasma-deposited multi junction solar cell device called an amorphous silicon solar cell module comprising: a plurality of plasma deposited amorphous silicon solar cels consisting of: a transparent sheet glass plate coated with a transparent conductive oxide (TCO) layer by an atmospheric pressure chemical vapour deposition method; a number of fine screen-printed lines and two wider bus bars of Ag frit on TCO and fired at a high temperature for forming metallic contact to each of the individual cells on the glass substrate; a sequence of seven amorphous silicon layers and one micro crystalline silicon layer deposited in a single chamber at elevated substrate temperatures, the process gases being diluted with hydrogen; an amorphous silicon carbide buffer layer with a graded band gap at the sensitive p/l interface produced by brief introduction of a carbon containing process gas such as methane and relying on the continuous vacuum pumping to produce the desired band gap grading; removing traces of dopant gas from the single deposition chamber by alternate purging with hydrogen gas and vacuum pumping; forming a microcrystalline silicon layer such that It form a recombination junction with the p layer of the next junction; carrying out series interconnection of cells in the module by firstly forming without breaking vacuum a back ohmic contact of sputtered silver film covering the entire module area and secondly removing the silver film from specific areas another screen printing and wet chemical etching so as to obtain the desired cell isolation and series interconnection of cells. |
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542-KOL-2005-CORRESPONDENCE.pdf
542-kol-2005-granted-abstract.pdf
542-kol-2005-granted-claims.pdf
542-kol-2005-granted-correspondence.pdf
542-kol-2005-granted-description (complete).pdf
542-kol-2005-granted-drawings.pdf
542-kol-2005-granted-examination report.pdf
542-kol-2005-granted-form 1.pdf
542-kol-2005-granted-form 18.pdf
542-kol-2005-granted-form 2.pdf
542-kol-2005-granted-form 3.pdf
542-kol-2005-granted-reply to examination report.pdf
542-kol-2005-granted-specification.pdf
Patent Number | 226174 | |||||||||||||||||||||||||||
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Indian Patent Application Number | 542/KOL/2005 | |||||||||||||||||||||||||||
PG Journal Number | 50/2008 | |||||||||||||||||||||||||||
Publication Date | 12-Dec-2008 | |||||||||||||||||||||||||||
Grant Date | 08-Dec-2008 | |||||||||||||||||||||||||||
Date of Filing | 23-Jun-2005 | |||||||||||||||||||||||||||
Name of Patentee | BHARAT HEAVY ELECTRICALS LIMITED | |||||||||||||||||||||||||||
Applicant Address | REGIONAL OPERATIONS DIVISION (ROD), PLOT NO:9/1, DJ BLOCK, 3RD FLOOR, KARUNAMOYEE, SALT LAKE CITY, KOLKATA-700091, REGD. OFFICE: BHEL HOUSE, SIRI FORT, NEW DELHI-110049 | |||||||||||||||||||||||||||
Inventors:
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PCT International Classification Number | H01L 31/06 | |||||||||||||||||||||||||||
PCT International Application Number | N/A | |||||||||||||||||||||||||||
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