Title of Invention

"A METHOD OF FABRICATING AN INTEGRATED CIRCUIT"

Abstract

A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90°C or above so as to provide a surface containing Si-0 bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si-0 bonds.

Full Text

We claim: 1. A method of fabricating an integrated circuit comprising the steps of: (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate, said silane coupling agent preferably being a compound of comprising the formula: (Formula Removed) wherein X is a polymerizable group selected from alkenes, vinyl and alkynes; R1 and R2 are the same or different and are H, alkyl, alkoxy, alkylester, alkenyl, alkynyl, aryl, cycloalkyl ; R3 is alkyl or a-C (0) R4 radical wherein R4 is alkyl ; a and b are the same or different and are 0,1 or 2, and y is from 1-3, with the proviso that the sum of a+b+y is 3. so as to provide a uniform coating of said silane-coupling agent on said substrate, (b) heating said substrate containing said coating of said silane-coupling agent at a temperature of 90°C to 200°C so as to provide a surface layer to said substrate containing Si-O bonds; (c) rinsing said heated substrate with a suitable solvent that is effective in removing any residual unreacted silane-coupling agent; and (d) applying a dielectric material to said rinsed surface containing said Si-O bonds. 2. The method as claimed in claim 1 wherein said substrate is a Si- containing substrate, a conductive metal, a metal barrier dielectric or an interlevel dielectric layer of an IC having metallic lines and vias formed therein. 3. The method as claimed in claim 1 wherein said silane-coupling agent is an alkoxysilane. 4. The method as claimed in claim 3 wherein said alkoxysilane is selected from the group consisting of vinyltriacetoxysilane, vinyltrimethoxysilane, vinyltriethoxysilane, allyltrimethoxysilane, vinyldiphenylethoxysilane, norborenyltriethoxysilane and trivinyltriethoxysilane. 5. The method as claimed in claim 1 wherein said silane-coupling agent is vinyltriacetoxysilane. 6. The method as claimed in claim 1 wherein said silane-coupling agent is applied as a concentrated solution. 7. The method as claimed in claim 6 wherein said silane-coupling agent is present in said concentrated solution in a concentration of at least 0.10% and preferably 0.2% to 5.0%. 8. The method as claimed in claim 7 wherein said siiane-coupling agent is present in a concentration of 2.5%. 9. The method as claimed in claim 1 wherein said siiane-coupling agent is be applied to the substrate by spin-on deposition, spray coating, dip coating, brushing, evaporation, or dissolution. 10. The method as claimed in claim 1 wherein step (b) is carried out for a time period of 10 seconds to 300 seconds. 11. The method as claimed in claim 1 wherein step (b) is carried out in an inert gas atmosphere. 12. The method as claimed in claim 1 wherein said solvent in step (c) is propylene glycol monomethyl ether acetate. 13. The method as claimed in claim 1 wherein an optional baking step is conducted after step (c), but prior to step (d). 14. The method as claimed in claim 1 wherein said dielectric material has a dielectric constant of upto 3.8. 15. The method as claimed in claim 1 wherein step (d) comprises spin-on coating, chemical solution deposition, chemical vapor deposition (CVD), plasma-assisted CVD, evaporation, and dip coating. 16. The method as claimed in claim 12 wherein said dielectric material is selected from the group comprising of a polyimide; a Si-containing polymer; a benzocyclobutene; a polynorborane; a polyarylene ether; thermosetting polyarylene ethers; aromatic thermosetting resins; a parylene copolymer; parylene-F; polynapthalene; polytetrafluoronaphthalene; poly(octafluoro-bis- benzocyclobutene); Telfon-AF ; fluorinated-amorphous carbon; an Xerogels or a nanoporous silica. 17. The method as claimed in claim 16 wherein said dielectric material is methylsilsesquixoane (MSSQ), hydridosilsesquixoane or SiLK@. 18. The method as claimed in claim 1 wherein processing steps (a)- (d) are repeated to provide a multi- level interconnect structure.

Documents:

1322-DELNP-2003-Abstract-(01-10-2008).pdf

1322-delnp-2003-abstract-(16-09-2008).pdf

1322-DELNP-2003-Claims-(01-10-2008).pdf

1322-delnp-2003-claims-(16-09-2008).pdf

1322-delnp-2003-correspondence-others-(16-09-2008).pdf

1322-DELNP-2003-Correspondence-Others-(24-12-2003).pdf

1322-DELNP-2003-Description (Complete)-(01-10-2008).pdf

1322-delnp-2003-drawings-(16-09-2008).pdf

1322-DELNP-2003-Form-1-(01-10-2008).pdf

1322-DELNP-2003-Form-1-(24-12-2003).pdf

1322-DELNP-2003-Form-2-(01-10-2008).pdf

1322-delnp-2003-form-3-(16-09-2008).pdf

1322-delnp-2003-petition-137-(16-09-2008).pdf

1322-delnp-2003-petition-138-(16-09-2008).pdf