Title of Invention	SOLID, CONDUCTING, PRINTED, PILLAR ROUTE FOR MAKING HIGH DENSITY INTERCONNECTIONS ON PRINTED WIRING BOARDS
Abstract	A Solid Conducting Printed Pillar Route for making high density interconnections i.e. small via holes on printed wiring boards is developed for the first time, which can be used by the PWB manufacturers all over the world.

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DESCRIPTION This invention relates to Solid Conducting printed Pillar route for making High Density interconnections Printed wiring boards used in electronics. DESCRIPTION OF PRIOR ART Printed wiring boards are used extensively in all electronics assemblies. They are essentially built using double-sided copper clad organic glass epoxy laminates. Holes are drilled mechanically at required locations, and hole barrels metallised through electroless copper plating to establish interlayer electrical connections. The electronics circuit is then etched on the copper planes using standard methods. This type of board is called as Double Sided Plated Through Hole Printed Wiring Board. As the complexity of the circuit grows, more layers of circuitry are required. Such boards are called as multilayer printed wiring boards [MLBs], They are produced, by separately making several Double Sided Wiring boards, and laminating them together using a hot press. In constructing such multilayer boards, there is need for electrically connecting the different layers as per the design. This is done by using different" electrical via" connections. There are three types of such "electrical via" connections possible. They are blind, buried, and through via connections. Through vias are always achieved by drilling, typically 0.60 to 0.40 mm diameter holes, through and through the laminated structure at desired locations, followed by copper plating through the hole barrel to establish electrical connectivity. However, it is not simple to obtain blind and buried via interconnections by these conventional MLB technologies. In the drive for miniaturization, the size of the typical drilled hole has reduced from 0.60 mm dia to less than 0.20 mm dia. The need for "blind and buried via connections" has drastically increased with the usage of high pin count packages by the designers. Boards incorporating blind and buried vias, with hole smaller than 0.20 mm are called as "micro-via boards" and the technologies of making such boards as "micro via technologies", or broadly as high-density interconnections [HDI]. HDI boards require special manufacturing methods, and are built sequentially adding layer by layer of dielectric and conducting layers. Such construction approach is known as Build up Multilayer [BuM] constructions. BuM Constructions use different methods of making small holes i.e. holes less than 200 microns in dial. Some of the well-known commercial approaches are: 1. Mechanical drilling: Small holes up to 200 microns in dia can be drilled using mechanical drilling machines. It is used to make BuM boards only for through and through hole interconnections. 2. Photo definition: In this method UV light is used create small holes through standard imaging methods. On a core substrate, a photosensitive dielectric material is coated, and imaged for micro vias, which is subsequently metalised by standard methods. 3. Laser ablation: Laser drilling is a well-known technique for making precise holes. Holes as small as SO microns are drilled and metalised by standard methods. 4. Plasma etching: Plasma is another source used for etching holes in the dielectric material in the required locations, using copper as metal mask. 5. Chemical milling: Certain dielectric materials such as polyimides can be dissolved in some solvents. Solvent etching of small holes is another method of making microvia holes. Limitations of the Prior Art: In mechanical drilling holes less than 200 microns, and ability go blind or buried is a great challenge. Special drill geometry and machines are required. These dedicated machines are expensive, operating costs high, and productivity is low. Controlling drilled depth makes the machine further complex, more expensive, and less productive. Photo definition appears simple, but calls for operations in tighter process windows, and special materials, as well as coating methods are required Laser ablation is elegant, but require very large investments in infrastructure. Plasma etching provides very clean holes but is not productive as it calls for batch operations. Chemical milling is very limited in its applications; can be used only for special dielectrics like polyamides, process steps are cumbersome, and not eco friendly. All these above listed BuM methods involve applying the dielectric material over the entire surface area of the board and then selectively removing the applied material to create micro holes, using techniques described as above. The approach presented in this patent is novel and new in the sense, as it involves selectively printing the conducting epoxy micro-pillars wherever the interconnections are desired. In this approach, the ultimate objective of obtaining the interlayer electrical connections is through print and cure process steps only, thus eliminating the need for metal plating after making the hole, in whatever method chosen. Process description: The micro pillars are printed using conducting paste on the corresponding lands of the board. The board carrying these micro pillars are first treated at 80°C for 15 mins which brings the pillars to B stage which is a tacky state but still sufficiently strong. The pillars are only partly conducting at this stage. The laminate/core carrying the partly cured pillars is then coated with dielectric epoxy material to the height of the pillars, A copper foil placed on the top, pressed, and the entire sandwich cured at 140° C for 30 mins to bring the pillars to what is known as "C" stage. The pillars attain full conductivity now and also bond the top copper layer. The top layer is then patterned by usual known methods such as photolithographic technique. In the accompanying drawings; Fig. 1 illustrates the three types of "electrical via" connections made in multilayer boards; and Fig. 2 illustrates the steps of making the micro pillars according to the process of the present invention. There are three types of such "electrical via" connections possible. They are blind, buried, and through via connections marked as A, B and C respectively. This is depicted pictorially in Fig. 1. On a Copper clad laminate D, the first layer image E was etched and the conducting pillars F were formed on the pillar pad. The dielectric G was filled to the pillar height and the copper foil H was laid and bonded on the top. On the top of the copper foil the second pattern I is formed. This is depicted pictorially in Fig.2. Example: First, FR-4 grade copper clad sheet in the size 3" x 6" size was taken. Surface was cleaned and the first layer image was transferred using conventional dry film imaging process. The image was developed in 1.5% sodixmi carbonate solution in a spray developer. The imaged board was etched in cupric chloride solution using spray etcher. First layer imaging and etching is now complete. The copper pattern etched carries the corresponding land to support the printed pillars. A stainless steel stencil carrying holes in the desired locations for micro pillars was prepared, and used for printing the conducting solid pillars on the corresponding lands. The board was heated at 80** C for a short duration [30 mins] till the printed pillars are partly cured. Another stainless steel 1 stencil was used to coat the epoxy dielectric material to the height of the pillars, and after applying the dielectric [Epoxy] the board was subjected to cure in an hot air oven [ 80° C/30 mins]. The pillar material as well as the dielectric is now in a tacky cured state. A copper foil [18 microns in thickness and treated for adhesion] was placed in the laminate and was laminated in a multiplayer press. The second copper layer was imaged and etched to get a two-layer micron via board. The steps are repeated to sequentially build the subsequent layers. We Claim: 1. A Solid conducting printed pillar route for making high density interconnections on printed wiring boards comprising of steps: a. Selectively printing micro-pillars using a conducting paste on the corresponding lands on the board; b. Treating the board obtained in step (a) at 80 degrees Centigrade for 15 minutes to render the pillars partly hard/conducting; c. Coating the laminate/core carrying the partly hard/conducting pillars with liquid epoxy material to the height of the pillars and fully curing the epoxy material; and d. Sandwiching the board by placing a copper foil on the top and pressings followed by curing at 140degrees centigrade for 30 minutes to render full hardness and conductivity. 2. Solid printed pillar route as claimed in claim 1, wherein the core is a copper clad laminate. 3. Solid printed pillar route as claimed in the preceding claims, wherein steps (a) to (e) of claim 1 are repeated to build further copper layers on both sides of the core laminate.

Documents:

0164-che-2004 abstract-duplicate.pdf

0164-che-2004 claims-duplicate.pdf

0164-che-2004 description (complete)-duplicate.pdf

0164-che-2004 drawings-duplicate.pdf

164-che-2004-abstract.pdf

164-che-2004-claims.pdf

164-che-2004-correspondnece-others.pdf

164-che-2004-correspondnece-po.pdf

164-che-2004-description(complete).pdf

164-che-2004-drawings.pdf

164-che-2004-form 1.pdf

164-che-2004-form 19.pdf

164-che-2004-form 26.pdf

164-che-2004-form 3.pdf