Title of Invention

PHASE DETECTOR AND METHOD OF PHASE DETECTION

Abstract In order to provide a phase detector and a method of phase detection which are distinguished by greater sensitivity and simple implementability, at least one differential signal of two input signals (Ua; Ub) may be formed over at least one predefined period by means of a first subtracter (12), at least one maximum value of the at least one differential signal may be detected by means of a first peak detector (16) and at least one minimum value of the at least one differential signal may be detected by means of a second peak detector (18) and at least one further differential signal (Uout) may be formed from the at least one maximum value and the at least one minimum value by means of a second subtracter (14).
Full Text

The invention relates to a phase detector and a method of phase detection having the features stated in the precharacterizing clauses of claims 1 and 6.
Phase detectors generally fulfill the task of quantifying a time shift in periodic signals of the same frequency However, the sensitivity of conventional phase detectors is in need of improvement
It is therefore an object of the invention to provide a phase detector and a method of phase detection which are distinguished by greater sensitivity and simple implementability.
This object is achieved according to the invention by a phase detector and a method of phase detection having the features stated in claims 1 and 6. The phase detector according to the invention is characterized, in that at least one differential signal of two input signals may be formed over at least one predefined period by means of a first subtracter, at least one maximum value of the at least one differential signal may be detected by means of a first peak detector and at least one minimum value of the at least one differential signal may be detected by means of a second peak detector and at least one further differential signal may be formed from the at least one maximum value and the at least one mmimum value by means of a second subtracter. The value of the further differential signal is a measure of the magnitude of the phase shift of the input signals. Such a phase detector is distinguished by its greater sensitivity and particularly simple implementability.
In a preferred development of the invention, the phase detector is monolithically integrated. In this way, increased economic viability is advantageously achieved.
Furthermore, in a preferred development of the invention the phase detector is integrated into a smart card. This advantageously opens up many different areas of application of the phase detector according to the invention.
Moreover, in a preferred development of the invention at least one of the signals to be processed is an electrical, audible or visual signal or the like. In this way, particularly favorable properties are advantageously achieved, wherein this embodiment is distinguished by a particularly large number of possible applications.

In addition, in a preferred development of the invention at least one of the signals to be processed may substantially be described by a Fourier series. In this way, particularly advantageous possible uses are achieved.
The method of phase detection according to the invention is characterized in that at least one differential signal of two input signals is formed over at feast one predefined period, at least one maximum value and at least one minimum value of the at least one differential signal is detected and at least one further differential signal is forracd ftora the at least one maximum value and the at least one minimum value. The value of the further differential signal is a measure of the magnitude of the phase shift of the input signals. This method is distinguished by its greater sensitivity and particularly simple implementability.
The method according to the invention is preferably characterized in that formation of at least one difference is effected by means of a subtracter and, also preferably, detection of the at least one maximum value and/or the at least one minimum value is effected by means of a peak detector. This makes the method particularly simple to implement.
Furthermore, the method according to the invention is preferably characterized in that at least one of the signals to be processed is an electrical, audible or visual signal or the like. In this way, particularly favorable properties are advantageously achieved, wherein this method is distinguished by a particularly large number of possible applications.
Finally, the method according to the invention is preferably characterized in that at least one of the signals to be processed may substantially be described by a Fourier series. In this way, particularly advantageous possible applications are achieved.
Further preferred developments of the invention are revealed by the remaining features stated in the dependent claims.
The invention will be further described with reference to examples of embodiment shown in the drawings to which, however, the invention is not restricted.
The Figure shows a block diagram of one embodiment of a phase detector 100 according to the invention, which comprises a first subtracter 12, a second subtracter 14, a first peak detector 16 and a second peak detector 18. Subtracters 12 and 14 and peak detectors 16 and 18 may in turn also be assembled from a plurality of sub-components.

Likewise, a combination of a plurality of components of the phase detector 100, such as in particular a monolithic integration on a microchip or in an existing microchip, is also feasible. Two input signals U, and Ub of substantially the same frequency are subtracted time wise from one another by means of the first subtracter 12. The difference between the functions of the two input signals U, and Ub is itself an oscillation with a minimum value and a maximum value. These are further removed from one another, the greater the phase shift of the two input signals U, and Ub- Tk« maximum value of the differential signal arising is then detected by means of the first peak detector 16 and the minimum value by means of the second peak detector 18. The difference between the two extrema is then formed by means of the second subtracter 14. This further differential signal U^i is a measure of the magnitude of the phase shift of the input signals U, and Ub and forms the output signal UM, of the phase detector 100. The function of the output signals Uom forms a minimum value in the case of phase coincidence of the input signals U„ and Ub- The phase detector 100 may be used in a phase shift range of from -180° to +180°, wherein no sign recognition takes place.

LIST OF REFERENCE NUMERALS:
100 Phase detector
12 First subtracter
14 Second subtracter
16 First peak detector, maximum value
18 Second peak detector, minimum value
U, Input signal
Ub Input signal
U0Ul Further differential signal, output signal

We claim:
1. A phase detector with two input signals, wherein at least one differential signal of two input signals (Ua; Ub) may be formed over at least one predefined period by means of a first subtracter (12), characterized in that at least one maximum value of the at least one differential signal may be detected by means of a first peak detector (16) and at least one minimum value of the at least one differential signal may be detected by means of a second peak detector (18) and at least one further differential signal (Uout) may be formed from the at least one maximum value and the at least one minimum value by means of a second subtracter (14).
2. The phase detector as claimed in claim 1, wherein the phase detector (100) is monolithically integrated.
3. The phase detector as claimed in any one of the preceding claims, wherein the phase detector (100) is integrated into a smart card.
4. The phase detector as claimed in any one of the preceding claims, wherein at least one of the signals (Ua; Ub; Uout) to be processed is an electrical, audible or visual signal or the like.
5. The phase detector as claimed in any one of the preceding claims, wherein at least one of the signals (Ua; Ub; Uout) to be processed may substantially be described by a Fourier series.
6. A method of phase detection with two input signals, wherein at least one differential signal of two input signals is formed over at least one predefined period, characterized in that at least one maximum value and at least one minimum value of the at least one differential signal is detected and at least one further differential signal is formed from the at least one maximum value and the at least one minimum value.

7. The method as claimed in claim 6, wherein at least one difference is
formed by means of a subtracter (14).
8. The method as claimed in either one of claims 6 to 7, wherein at least one
maximum value and/or of the at least one minimum value are effected by means of a
peak detector (16,18).
9. The method as claimed in any one of claims 6 to 8, wherein at least one of
the signals to be processed is an electrical, audible or visual signal or the like.
10. The method as claimed in any one of claims 6 to 9, wherein at least one of
the signals to be processed may substantially be described by a Fourier series.


Documents:

3156-chenp-2005 abstract duplicate.pdf

3156-chenp-2005 abstract.pdf

3156-chenp-2005 claims duplicate.pdf

3156-chenp-2005 claims.pdf

3156-chenp-2005 correspondences others.pdf

3156-chenp-2005 correspondences po.pdf

3156-chenp-2005 description (complete) duplicate.pdf

3156-chenp-2005 description (complete).pdf

3156-chenp-2005 drawings duplicate.pdf

3156-chenp-2005 drawings.pdf

3156-chenp-2005 form-1.pdf

3156-chenp-2005 form-13.pdf

3156-chenp-2005 form-18.pdf

3156-chenp-2005 form-26.pdf

3156-chenp-2005 form-3.pdf

3156-chenp-2005 form-5.pdf

3156-chenp-2005 pct.pdf


Patent Number 229969
Indian Patent Application Number 3156/CHENP/2005
PG Journal Number 13/2009
Publication Date 27-Mar-2009
Grant Date 24-Feb-2009
Date of Filing 25-Nov-2005
Name of Patentee NXP B.V
Applicant Address HIGH TECH CAMPUS 60, NL-5656 AG EINDHOVEN,
Inventors:
# Inventor's Name Inventor's Address
1 KADNER, Martin c/o Philips Intellectual Property & Standards GmbH, Weisshausstrasse 2, 52066 Aachen,
PCT International Classification Number H03D13/00
PCT International Application Number PCT/IB2004/050705
PCT International Filing date 2004-05-14
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 03101533.2 2003-05-27 EUROPEAN UNION