Title of Invention

"A METHOD FOR PRODUCING PIN DIODE"

Abstract A method for producing PIN diode for recording and measuring incident neutron radiation comprising following steps: (i) diffusion of boron and phosphorus in cleaned silicon wafer using flimtronics papers; (II) subjecting the said doped silicon wafer to the step of thermal oxidation; (iii) phosphorus deposition on silicon wafer obtained from step(ii); (iv) electroless nickel deposition on silicon wafer obtained from step (iii); (v) gold deposition on silicon wafers obtained from step (Iv); (vi) dicing of silicon wafers.
Full Text FILED OF INVENTION
The invention relates to a method for producing PIN diode for recording and measuring incident fast neutron radiation.
PRIOR ART
Silicon PIN diodes are utilised to measure incident fast neutrons. These neutrons are basically used for medical and other purposes. In these applications, it is important to note the amount of dose of the neutrons to which working persons are exposed in a fast and accurate manner. These silicon PIN diodes, already known in the art , are produced by diffusing pre¬selected impurities into the broad surfaces of a large wafer of silicon. The forward voltage drop of such a PIN diode, at a constant current, is used to monitor fast neutron damage in the base region of the diode which is a measure of the dosage of the incident neutron. These PIN diodes are well known to the art. However, these PIN diodes and methods of producing thereof, known in the art, suffer from the following disadvantages.
Main disadvantage of the methods for producing PIN diodes, known in the art, is that these methods result in PIN diodes, which do not have uniform sensitivity for the entire range of measurement of neutron radiation.
Another disadvantage of the methods for producing PIN diodes, known in the art, is that these methods result in PIN diodes, which are quite bulky.
Yet another disadvantage of the methods for producing PIN diodes, known in the art, is that these methods result in PIN diodes, which suffer from the problems of fading of information regarding incident neutron radiation over a period of time.
Still another disadvantage of the methods for producing PIN diodes, known in the art, is that these methods result in PIN diodes which are sensitive to the incident gamma radiation and as such these can not be utilised exclusively for detecting fast neutrons.
OBJECTS OF PRESENT INVENTION
Primary object of the invention is to provide a method for producing PIN diodes which result in PIN diodes having abilities to measure the incident neutron radiation from 1 to 1000 centi gray.
Another object of the invention is to provide a method for producing PIN diodes which result in PIN diodes having uniform sensitivities over the entire range of measurement from 1 to 1000 centi gray.
Yet another object of the invention is to provide a process for the fabrication of PIN diodes which result in PIN diodes which suffer almost no fading of information regarding incident neutron radiation.

Yet further object of the invention is to provide a method for producinq PIN diodes which result in PIN diodes that are quite compact in size.
Still further object of the invention is to provide a method for producing PIN diodes, which result in PIN diodes having the ability to measure detecting first neutrons having energy from 0.1 to 16 MeV.
Yet further object of the invention is to provide a method for producing PIN diodes which result in PIN diodes which are not sensitive to gamma radiation.
DESCRIPTION OF THE INVENTION
According to this invention there is provided a method for producing P-I-N diode for recording and measuring incident neutron radiation comprising following steps:
ii) diffusion of boron and phosphorous in cleaned silicon wafer using filmtroni.es papers,
(ii) subjecting the doped silicon wafer to the step of thermal oxidation,
(iii) phosphorus deposition on silicon wafer obtained from step (ii),

( iv) electroless nickel deposition on silicon wafer
obtained from step (iii),
(v) gold deposition on silicon wafers obtained from
step f iv} ,
(vi) dicirtq of silicon wafers.
In accordance with the present invention, the method for producing PIN diode comprises of following steps; (i) Selection and cleaning, of silicon wafer
F—Z fnonocrystal 1 ine n type silicon wafer of having thickness about 1000 micron, resistivity from 40 to 60 ohm cm, diameter 50.8 mm orientation (111) and life time of carriers more than 500 micro seconds is cleaned with determents, de—ionised water, acetone, H2O2+H2SO4 for about 5 to 20 minutes. Next, it is dried in oven for 1-2 hours at temperature 70-80°C.
(i i) Diffusion of boron and phosehorous in cleaned silicon wafers using filmtronics papers
Diffusion of boron and phosphrous into the cleaned silicon wafers, uniformly up to a depth of 20—25 micron with required concentration of carriers, is carried out by using filmtronics papers having chemicals to donate the ions. The cleaned and dried silicon wafers are stacked horizontally along with filmtronics papers for this purpose. One paper (p-type) is inserted between two wafers. On the top of the second wafer other type of paper (n

type) is placed and then another wafer is placed. This way one paper is used for two wafers. It provides p and n region. The diffusion is carried out at 1200-1250°C for 10-15 hours and then slow cooling is followed at a rate of 40-60°C per hour. The V/l characteristic of the wafer is carried out to check for required diffusion depth and concentration.
(iii)Thermal oxidation of the doped silicon wafer
Doped silicon wafers obtained from step (ii) are destacked. After deoxidation at 800°C for 3-5 hours in nitrogen, wafers are loaded in a quartz boat and are pushed inside a furnace kept at 1200°C. First, wet oxygen and nitrogen is flushed for 1-2 hours and then dry oxygen and nitrogen is flushed for one hour. Next, furnace is cooled at the rate of 40-60°C per hour. After cooling, wafers are unloaded.
(iv) Phosphorus deposition on doped silicon wafers obtained from step (iii)
Oxide is removed from the n-side of the wafers by applying apiezone wax on the p-side and etching the oxide in hydro fluoric acid. Cleaned wafers are inserted in the furnace and nitrogen is passed through PoCI3 for 1-2 hours at about 1200°C. Furnace is cooled and V/l characteristics of the wafers are again measured.
(v) Electroless nickel deposition on silicon wafers obtained from step (iv)
After removing oxide from p and n sides of the wafers, these are dipped in hot mixture of nickel chloride, sodium hypo phosphate and ammonium chloride for 5 minutes . Next, these wafers are sintered at 500-600°C for 5-10 minutes.
(vi) Gold deposition on silicon wafers obtained from step (v)
Gold contacts in the silicon wafers obtained from step (v) are made to stop oxidation of nickel contacts and to have better ohmic contacts by dipping these wafers for about 5 minutes in hot gold potassium cyanide .
(vii) Dicing of wafers
Finally, the processed wafers are diced by using diamond tool. Finally diced chips are soldered to tinned copper leads.
The specifications of the neutron radiation sensitive PIN diodes, produced according to above manner, are as in the following
Size 2.75 mm x 2.75 mm x 1 mm
Lead Material Tinned copper wire
Neutron sensitivity 0.80 mV/centi gray
Fading of forward voltage Less than 5% In 24 hours
p & n Diffusion 20 to 25 micron with carrier
concentration 1018 to 1020 cm"3

The invention will now be illustrated with a working example, which is a typical example to illustrate the working of the invention and is not intended to be taken restrictively to imply any limitation on the scope of the present invention.
WORKING EXAMPLE
The special silicon F-Z wafer of thickness 1000 urn, resistivity 40-60 ohm cm, life time 1000 micro second, orientation (111) is cleaned with detergents, de-ionised water and acetone and dried at 70°C in an oven. Diffusion of Boron and Phosphorous in the cleaned and dried silicon wafer is carried out at optimized temperature of 1230°C for 12 hours by using filmtronics paper having chemicals to donate the ions after stacking the cleaned silicon wafers. V/l characteristic of the doped silicon wafer is measured for p and n side respectively to check for diffusion depth and concentration of carriers. Next, wafers are destacked for carrying out thermal oxidation. Oxide is removed from n side and phosphorous deposition is carried out in the furnace at about 1200°C by passing nitrogen through PoCb . V/l characteristic of the wafer is again measured. Electroless nickel deposition is carried out by dipping the wafer in the hot mixture of nickel chloride, sodium hypo phosphate and ammonium chloride for 5 minutes after removing oxide from p and n side. Later, sintering is done at 550°C for 5 minutes. Gold deposition for contacts is made to stop oxidation and to have better ohmic contacts. Thick wafer is diced and DO-27 standard coding with lead/tin/silver solder is performed. Finally, PIN diodes of size 2.75 x 2.75 x 1 are obtained.
It is to be understood that the process of the present invention is susceptible to adaptations, changes and modifications by those skilled in the art. Such adaptations, changes and modifications are intended to be within the scope of the present invention, which is further set forth with the following claims.




WE CLAIM;
1. A method for producing P-I-N diode for recording and measuring incident neutron radiation characterized by the steps of:-
(i) diffusion of boron and phosphorous in cleaned silicon wafer using
filmtronics papers, (ii) subjecting the said doped silicon wafer to the step of thermal
oxidation,
(iii) phosphorous deposition on silison wafer obtained from step (ii), (iv) electrtoless nickel deposition on silicon wafer obtained from step
(v) gold deposition on silicon wafers obtained from step (iv), (vi) dicing of silison wafers.
2. A method as claimed in claim 1 wherein the said silicon wafer has
orientation (111), wafer thickness about 1000 µm, resistivity, 40-60 ohm
cm and life time more than 500 micron second.
3. A method as claimed in claim 1 wherein said diffusion of boron and
phosphorous is carried out in a furnace at 1200-1250°C for 10-15 hours
using filmtronics papers up to a depth of 25 microns.

4. A method as claimed in claim 1 wherein said thermal oxidation of the
said doped silicon wafer obtained from step (i) is carried out at 1200°C
for 1-2 hours by flushing wet oxygen and nitrogen and then dry oxygen
and nitrogen through it.
5. A method as claimed in claim 1 wherein said phosphorous deposition on
the said doped silison wafer obtained from step (ii) is carried out after
removing the oxide from the n side and passing nitrogen through POC13
at about 1200°C.
6. A methof as claimed in claim 1 wherein said electroless depostion of
nickel on the said doped silicon wafer obtained from step (iii) is carried
out by dipping the said wafer in hot mixture of nickel chloride, sodium
hypo phosphate ammonium chloride for 5 minutes after removing oxide
from p and n side and then sintering it at around 500-600° for 1-2
hours.
7. A method as claimed in claim 1 wherein said gold deposition is carried
out by dipping the said wafers obtained from step (iv) for 5 minutes in
gold potassium cyanide.
8. A method as. claimed in claim 1 wherein said dicing of wafer is carried
out by diamond tool.
9. A method for producing P-I-N diode substantially as described and exemplified herein.



Documents:

534-del-2001-abstract.pdf

534-del-2001-claims.pdf

534-del-2001-correspondence-others.pdf

534-del-2001-correspondence-po.pdf

534-del-2001-description (complete).pdf

534-del-2001-form-1.pdf

534-del-2001-form-18.pdf

534-del-2001-form-2.pdf

534-del-2001-form-26.pdf

534-del-2001-form-3.pdf

534-del-2001-form-4.pdf


Patent Number 230942
Indian Patent Application Number 534/DEL/2001
PG Journal Number 13/2009
Publication Date 27-Mar-2009
Grant Date 28-Feb-2009
Date of Filing 30-Apr-2001
Name of Patentee ADDITIONAL DIRECTOR (IPR)
Applicant Address DEFENCE RESEARCH AND DEVELOPMENT ORGANISATION, MINISTRY OF DEFENCE, GOVT. OF INDIA, B-341, SENA BHAWAN, DHQ P.O., NEW DELHI-110011
Inventors:
# Inventor's Name Inventor's Address
1 PRADEEP KUMAR BHATNAGAR DEFENCE LABORATORY, JODHPUR 342011
2 ARUN PANDYA DEFENCE LABORATORY, JODHPUR 342011
3 ALLA RAMALINGA REDDY SPIC, WEST BLOCK VIII, WING, 1, 1ST FLOOR, RK PURAM, NEW DELHI 110066
4 DEEP KUMAR THAKUR CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
5 VINOD KUMAR KHANNA CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
6 SUMER SINGH SHEKHAWAT CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
7 SURESH CHANDER SOOD CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
8 ANIL KUMAR CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
9 KHARAITY LAL JASUJA CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
10 PURUSHOTTAM DAS VYAS CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
11 WAMAN SADASHEO KHOKLE CENTRAL ELECTRONIC ENGINEERING RESEARCH INSTITUTE PILANI
PCT International Classification Number H01L 21/00
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 NA