Title of Invention

A SONAR POWER AMPLIFIER

Abstract A sonar power amplifier. The amplifier has a DC regulator, push-pull output stage, a drive generator, control and protection circuit wherein the power supply is shaped-DC which converts raw DC voltage to a full wave rectified and regulation version of the signal with snubber-less class-D switching and where in the power supply is applied at the centre-tap of the push-pull transformer where high level multiplication with square wave is achieved.
Full Text FILED OF THE INVENTION
The present invention relates to a sonar power amplifier. More specifically, Hbut without implying, any limitation thereto, the invention relates to a sonar power amplifier for under-water communication applications.
BACKGROUND OF THE INVENTION
Sonar transmitter demands high power levels across complex loads with minimum hardware and size. Particularly for underwater communication applications, the waveform (i.e. low distortion) is also required to be preserved. Underwater transducers to be driven are subjected to variation in impedance due to pressure variation. This demands linear variation in power levels to avoid over loading. For this purpose, switching power amplification using class-D or class-S switching is used. However, the use of Class-D or class-S switching have the limitations of their own.
The major limitations of use of class-D or class-S switching include the problems like power control, limited band width, DC power supply regulation for stable output power etc., which in turn limit their utility.
A traditional method which is most commonly used for sonar application is the usage of the class-B/class-AB amplifiers.
Such known class-B/class-AB amplifiers are linear amplifier having low distortion levels and no EMC problem. But for the same power output, the volume occupied by them would be a very large, which limits their wide applicability.
The another major disadvantage of such known class-B/class-AB amplifiers is that, the overall efficiency that can be obtained with such amplifiers would only be of order of 50-55%.

Still another disadvantage of such known class B/class-AB amplifiers is the loss of power, which generates heat, which inturn has to be dissipated through heat sink, occupying a large volume.
The improvement in efficiency and hence reduction in size has been tried in later variations of these known amplifiers. Such variations include class-S and class-D amplifiers as stated herein above, with their major limitations.
The class-S amplifiers, as known in the prior art, are simple modifications of linear amplifiers, in which the switching is achieved by overdrive. The efficiency is of the order of 75% excluding the power supply.
The major problem of known class-S type of amplifiers is the requirement of dissipating snubbers, to reduce stress on the devices and the generation of EMI while switching.
The another drawback of known class-S type of amplifiers is the requirement of high power filters to eliminate harmonics before transduction i.e. conversion of electrical energy to acoustic sound/magnetic energy etc. These filters are bulky and occupy space, which is also the problem of traditional/class-B/class-AB amplifiers.
The disadvantage of occupying space/volume, of class-S type of amplifiers, for the same power output results in increase in volume of the device by at least 50%, which inturn also leads to another disadvantage of loss of overall efficiency.
Still another disadvantage of known class-S type of
amplifiers is that, the power control in these amplifiers
has to be achieved by change in the ON-OFF ratio within one
half cycle period, which in-turn results in higher total
harmonic distortions.

Another alternative to solve the disadvantages of known class-S amplifiers, mainly for power control, is the change in powor nupply it.nolf, which donmndn powor oupply regulation, and results in another major disadvantage of increase in the overall volume.
The class-D amplifiers, as known in the prior art, have disadvantage, of reduced efficiency due to increased number of switching operations.
The switching carried-out using the known class-D amplifiers, at high voltage and current levels, results in increased stress on the devices alongwith the EMI problem. This stress can be reduced by dissipating snubbers but these snubbers bring down the efficiency to an order of 70 to 75% at full load, excluding power supply.
OBJECT OF THE INVENTION
The main object of the present invention is to provide a power amplifier, particularly a sonar power amplifier for underwater communication applications in the sonar range, which can overcome the disadvantages and limitations of known such amplifiers.
Another object of this invention is to propose a sonar power amplifier, which is light in weight, occupy less space having smaller volume and still having the better efficiency.
Yet another object of this invention is to propose disclosure of a sonar power amplifier which has no storage
element, no external oscillator, and simple structure with self exciting and fast switching.
Still another object of the invention is to propose a sonar power amplifier, wherein the raw DC voltage is converted to full-wave rectified version of signal in two steps.
Further object of this invention is to propose a sonar power amplifier, which has output with fixed gain of Sc and is independent of load independence (RL) and Vdc.
Still further object of this invention is to propose for a sonar amplifier with simple structure, minimum hardware, still having higher efficiency.
This is further an object of this invention to propose a sonar power amplifier, wherein the lossy snubbers and bulky filters, are eliminated and output stage provided with the centre-tap, which in-turn has "shaped DC-supply" and not the constant DC-supply.
This is still further an object of this invention to propose a sonar power amplifier having low distortion, no switching stress and almost eliminated switching loss.
Yet another an object of this invention is to propose a sonar power amplifier, wherein the switching of the proposed device is done at low voltage and low current, particularly near zero crossing of the signal.
BRIEF DESCRITPION OF THE INVENTION
According to this invention there is provided a sonar power amplifier characterized in that a DC regulator, push-pull output stage, a drive generator, control and protection circuit wherein the power supply is shaped-DC which converts DC voltage to a full wave rectified and regulation version of the signal with snubber-less class-switching and where in the power supply is applied at the centre-tap of the applied at the centre-tap of the push transformer where high level multiplication with square wave is achieved.
The basic aim of the present invention is to achieve the maximum power in the smallest volume while meeting the requirements of distortion less output, reduced EMI and linear power control in a simple structured sonar power amplifier.
The improvement of the sonar power amplifier as disclosed herein, mainly comprises of providing the power supply shaping stage and the output stage. The full-wave-rectified version of signal obtained from power supply shaping stage is used in the output stage and the same has a fixed gain of Sc from signal and varies linearly with the input signal level. Such an arrangement of both the stages, as stated above, results in simple power control, which in turn is proportional to the input.me power supply stage, in accordance to this invention is a variation of buck regulator configuration, which converts a raw DC voltage to a full-wave rectified version of the signal. This conversion is preferably achieved by performing a snubber-less class-D switching.
In accordance to this invention, at the differential output stage this high level full-wave rectified version of the signal is converted back to full sine wave and drives the load.
Further, in accordance to this invention this conversion is achieved by multiplying varying power supply by a square wave. The multiplication of these high level signals is carried out in the output stage, having recently disclosed configuration in accordance to this invention.
- . The sonar power amplifier, in accordance to the preferred embodiments of the present invention combines the modified version of buck regulator, class-D switching and finally class-S switching and is described fully, herein below with the help of the enclosed figures.
DESCRIPTION OF THE -INVENTION WITH REFERENCE TO DRAWINGS
Figure-1, shows the elaborated block diagram of the sonar power amplifier.
Figure-2a, shows the elaborated block diagram of the power supply stage in accordance with the most preferred embodiment of this invention.
Figure-2b, shows the singals from the nodes of power supply stage, shown in figure-2a, in accordance with the most preferred embodiment of this invention.
Figure-3a, shows the elaborated block diagram of the output stage, in accordance with the most preferred embodiment of this invention.
Figure-3b, shows the signals at different nodes of output stage, shown in figure-3a, in accordance with the most preferred embodiment of this invention.
Figure-4a, shows the wave forms obtained at different nodes.
Figure-4b, shows the current and voltage wave forms in a resistive load, in accordance with the preferred embodiment of this invention.
Figure-5, shows the comparison between efficiency of the sonar power amplifier having the configuration in accordance with the preferred embodiments of this invention and that of class-B amplifier.
Figure-6, shows the distortion of the sonar power amplifier constructed in accordance with the preferred embodiments of this invention as compared to class-S amplifier.
Figure-7, shows the linearity of power variation in the sonar power amplifier constructed in accordance with the
preferred embodiments of this invention
DETAILED DESCR1TPION OF THE INVENTION
A sonar power amplifier of the present invention comprises of power supply stage and output stage.
Referring to figure -1, which shows the elaborated block diagram of the sonar power amplifier according to the most preferred embodiment of this invention, is characterized by DC regulator, a push-pull out-put stage, a derive regulator, a control and a protection circuit.
Fig. 1 shows connection among signal I/R (1), peak detector (2), (3), (4), (5), (6) and (7).
The power supply stage, as shown in fugure-2a is a variation of buck regulator configuration, which converts a raw DC voltage to a full-wave rectified version of signal with a fixed gain of Sc by performing a snubber-less class-D switching, which in-turn is achieved by giving the full-wave rectified version of the signal as varying reference and by keeping the response time low.
Fig. 2 depicts the relation among level shifter (8); full wave rectifier (9) etc.
In accordance to the present invention, the reduction in response time is achieved by capacitor less filtering.
The performance of the presently disclosed power supply stage to achieve the objectives as stated above is understood from the following description and equations.
In accordance to this invention, when Ql (Fig 2(a)), acting as a switch is closed, the current through inductor increases, and hence the voltage across RL also increases, which in-turn results in the increased feed back voltage (VF) and open switch Ql. When Ql is open, current through L continues to flow due energy stored in the inductor, thereby forward biasing diode (D). This current decreases with time thereby reducing the voltage available across the load RL.
The equation- 1 is obtained for time, TQN, when switch Ql is closed and equation-2, is obtained for time, TOFF' when the switch Ql is open.
Equation- 1: exp[-(RL/L) TQN] = l - [A. Sin (w. TON) +VH+]
Vdc . Sc

Equation-2:

exp [-

TOFF] = [A.Sin (w.Tw) +VH_]

ICH(TON) Where TW = TQN + T QFF
TQN and TQFF are determined by the factors like L, RL, supply voltage, VH, Sc, input signal frequency and signal amplitude. The pulse width (T.J is minimum at the
Wf
highest slope of Vp, i.e. near zero crossing of the signal.
While designing, the following data are taken as the design values :-

i) peak input signal swing,
ii) peak output swing at highest load-power
iii) load impedance for switcher
iv) maximum signal frequency

VPIN
VPKO RL
fsmax

The following are chosen or assumed

pKo,
pKO/vPIN
Sc = V
VDCmin > (3/2) V
VH = VpIN/10 and TQN = (1/3. fsw)

fsw >. 50. fsmax

In accordance to the presently disclosed invention the varying supply voltage applied at the centre -tap of push-pull transformer is not constant DC but shaped DC. The power supply stage, as disclosed herein above has fast response to the varying reference.
In accordance to this invention, the fast switching as referred herein above, is achieved by avoiding the storage

element across RL . The full-wave rectified version of signal as varying reference, converts the raw DC votage, at stated herein above, to a full-wane rectified version of signal with a fixed gain of Sc, in two steps. Output of the switch Ql is a class-D switched version, wherein no external oscillator is used but excites itself with a frequency, which is dependent on input signal parameters like frequency, amplitude etc, and the output is then filtered by L, R, and D.
The Ql is, always, either in cut-off or in saturation, in accordance to this invention, which in-turn results in minimised power loss.
The buck regulator, as disclosed herein above, operates mainly in current mode, which in-turn is due to absence of filter capacitor. However, the switched wave-form at the input of L is smoothed due to first order filtering in the feedback.
In accordance to the presently disclosed invention, when Ql is switched-on, as described herein above, the presence of inductor will not allow the current through it to rise to maximum before voltage across it, drops to minimum. This arrangement/configuration of the presently disclosed power supply stage, facilitate minimum switchin-on and stress-on Ql. Whereas L stores the energy in, when Ql is on. When Ql is switched-off, D, a ultra fast recovery diode, clamps the drain to ground, thereby energy stored in L, now is transferred to load RL , that energy stored in L or stray inductance is not impressed across Ql. this configuration of presently disclosed power supply stage, comprising of combination of L and D provide a loss free snubbing.
Further, in accordance to the present invention, the output of power supply stage, as described herein above, has a fixed gain Sc and is independent of RL and Vdc, which in-turn results in achieving direct power level control, that is the effect of power regulation.
From the power supply stage, shown in figure-2a, and the signals from various nodes of power supply stage, as shown in figure-2b, it can be understood by those, who are conversant with the art of amplifiers and their applications, that VI is high level pulse-width-modulated form of VL, which is the high level full wave rectified version of signal. As known in the art, the fourier series of full-wave rectified sine wave with normalised peak is given by Equation-3
Equation-3, f (t)=2. - 4. Coswt - 4. Cos2wt
This has DC component and all the harmonics, which are not desirable. Fourier series of square wave as given by Equation-4, is
Equation-4, f(t)= 2T Coswt - 2 Cos3wt + 2. Cos 5wt
The DC and harmonics in VL , which is high level full-wave rectified version of the signal as stated herein above, is removed by multiplication of these two wave forms.
In accordance with the presently disclosed invention, this multiplication of these high level signals is carried in the output stage of the proposed sonar power amplifier.
The output stage, in accordance to the presently disclosed invention has the configuration as shown in figure-3a, which is driven with the shaped supply and the signals obtained at different nodes are shown in figure-3b.
The output stage, as disclosed presently converts the high level full-wave rectified version of the signal back to sine-wave and is given as drives to load.
The harmonics present in vi, as stated herein above, are further filtered by an additional filter, which also isolates the switching stage from the load.
The signal is buffered in a buffer B1, hard-clipped in a hard-clip (H1) and given as a VGi, whereas, VG2 is obtained by hard-clipping in a hard-clip (H2) the inverted signals. The signal is inverted in an inverter (Ii). Hard-clipping is done to obtain a square-wave drive to MOSFETs and is realised by over driven opamps. Ql and Q2 are power MOSFETs and are alternatively made ON and OFF at zero crossing of the signal.
Q2 is switched-on in the positive half cycle while Ql is switched-on in the negative half-cycle. As the switching is done at low voltage and low current levels (near zero crossing of the signal), there are no possibilities of high switching stress on the devices thus, the presently disclosed configuration avoids the use of lossy snubbers.
The switching loss is almost eliminated in the presently disclosed device. The only loss in the presently disclosed output stage is the loss due to the on resistance of Ql and Q2. Therefore, the devices can be used to their maximum ratings.
The output transformer, T, as shown in figure 3a, couple the signal to load. Since both voltage and current waveforms at the output are sinusoidal, as shown in figure- 4b, the distortion is observed to be low. The VI and V2 wave-forms obtained practically at different nodes of the device are shown in figure -4a.
The device, disclosed herein above definitely has the advantages, as described therein. In addition, the presently disclosed configuration of sonar power amplifier, has advantages of avoiding use of separate filter and of solving the problems of the existing switching power amplifiers.
This configuration of sonar power amplifier as described and disclosed herein above can be extended for various other applications. As the switching frequency can be of the order of 500KHz, it can be easily used over the entire sonar range. Due to the elimination of the switching stress, the device can be used to their maximum rating thereby leading to reduction in component count and
overall volume. The use of power MOSFETs (Ql and Q2) avoid second break down problem and demand simple drive requirements resulting in reduced hardware.
As the output stage of presently disclosed sonar power amplifier results in sine-wave form of output, the bulky filters are avoided which in-turn not only lead to reduction in size but also results in undistorted output. The effective snubbing in the configuration avoid the generation of current and voltage spikes, hence reduced EMI problem.
The indicator acts as the storage element performing the function of turn-on snubber as well. The diode provides the fly-back path and also functions as turn-off snubber, which helps in reducing the stress. It can be noticed that, the snubbing is an integral part of the circuit function and introduces no additional loss. Figure-5, shows the comparison of the efficiency of the presently disclosed sonar power amplifier, referred as new structure therein, and that of class-B amplifier.
The transducer together with water as the medium itself is a high frequency filter, and removes the residual high frequency components. The distortion of presently disclosed sonar power amplifier, is observed to be low when compared with class-S amplifier, as it can be understood from the figure-6.
The linear output power variation is achieved, as stated herein above, and the power supply is observed to vary linearly with input as observed in Figure-7, which shows the input voltage vs output power of the presently disclosed sonar power amplifier.




WE CLAIM
1. A sonar power amplifier characterized in that a DC regulator, push-pull output stage, a drive generator, control and protection circuit wherein the power supply is shaped-DC which converts DC voltage to a full wave rectified and regulation version of the signal with snubber-less class-switching and where in the power supply is applied at the centre-tap of the applied at the centre-tap of the push transformer where high level multiplication with square wave is achieved.
2. A sonar power amplifier as claimed in claim 1 wherein the power supply is a
variation of buck regulator configuration with self-excited switching.
3. A sonar power amplifier as claimed in claim 1 wherein the power supply has the fast
response to the varying reference which is achieved by avoiding use of storage
element across RL.
4. A sonar power amplifier as claimed in claim l wherein
the combination of inductor L and an ultra-fast recovery
diode D provide a loss-free snubbing.
5. A sonar power amplifier as claimed in claim 1 wherein
the output has a fixed gain Sc and is independent of load
impedence RL and Vdc thereby enables achievement of direct
power control.
6. A sonar power amplifier as claimed in claim l wherein
TQN and TOFF are obtained by Equation l and Equation 2 as
under:-
Equation-1: exp[-(RL/L) TQN] = 1 - [A.Sin(w.TON)+VH+]
Vdc. Sc Equation-2: exp[-(RL/L)TOFF] = [A.Sin(w.Tw)+VH_]
ICH(TON)'RL
Where TW = TQN and TQFF
Wherein pulse width TW is minimum at athe highest slope of Vp i.e. near zero crossing of the signl.
7. A sonar power amplifier as claimed in claim 1 wherein the Vdc min is preferably
taken as > 3/2 times of peak output swing at highest load power (VpKo).
8. A sonar power amplifier as claimed in claim 1 wherein Sc is preferably taken equal to
the ratio of Vpko/Vpin where Vpin is the peak input signal swing.
9. A sonar power amplifier as claimed in claim 1 wherein VH is preferably taken
approximately as one-tenth of Vpin.
10. A sonar power amplifier as claimed in claim 1 wherein Fsw is preferably taken as
greater than or equal to fifty times of fsmax.
11. A sonar power amplifier as claimed in claim 1 wherein TON is approximately taken as
one-third of fsw.
12. A sonar power amplifier as claimed in claim 1 wherein the switching is done at low
voltage and low current levels i.e. near zero crossing of the signal which eliminates
the high switching stress on the devices thereby avoiding the use of lossy snubbers.
13. A sonar power amplifier as claimed in claim 1 wherein both voltage and current wave
forms at the output are sinusoidal whereby the destortion is low.
14. A sonar power amplifier as claimed in claim 1 wherein inductor L the storage
element, also performs the function of turn-on snubber and where diode providing the
fly back path, also functions are turn-off snubber and thereby enabling loss-less
snubbing.
15. A sonar power amplifier substantially herein described and illustrated.
DATED THIS 3RD DAY OF JULY, 1998

Documents:

1884-del-1998-abstract.pdf

1884-del-1998-claims.pdf

1884-del-1998-correspondence-others.pdf

1884-del-1998-correspondence-po.pdf

1884-del-1998-description (complete).pdf

1884-del-1998-drawings.pdf

1884-del-1998-form-1.pdf

1884-del-1998-form-19.pdf

1884-del-1998-form-2.pdf

1884-del-1998-form-3.pdf

1884-del-1998-gpa.pdf


Patent Number 232786
Indian Patent Application Number 1884/DEL/1998
PG Journal Number 13/2009
Publication Date 27-Mar-2009
Grant Date 21-Mar-2009
Date of Filing 03-Jul-1998
Name of Patentee THE CHIEF CONTROLLER RESEARCH & DEVELOPMENT
Applicant Address TECHNICAL COORDIONATION DTE, B-341,SENA BHAWAN, DHQ P.O. NEW DELHI-110011, INDIA.
Inventors:
# Inventor's Name Inventor's Address
1 ATCHUTHAMENON KUNNATH PRAKASH TECHNICAL COORDINATION DTE, B-341 SENA BHAWAN, DHQ P.O. NEW DELHI-110011, INDIA.
2 SIVARAMAN VIJAYAN PILLAI TECHNICAL COORDINATION DTE, B-341 SENA BHAWAN, DHQ P.O. NEW DELHI-110011, INDIA.
3 NARAYANAN SIVAKUMAR TECHNICAL COORDINATION DTE, B-341 SENA BHAWAN, DHQ P.O. NEW DELHI-110011, INDIA.
4 KANNATHARA VARGHESE JOHN TECHNICAL COORDINATION DTE, B-341 SENA BHAWAN, DHQ P.O. NEW DELHI-110011, INDIA.
PCT International Classification Number H04B 1/02
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 NA