Title of Invention

PSEUDO-DUAL PORT MEMORY HAVING A CLOCK FOR EACH PORT

Abstract A pseudo-dual port memory (1) has a first port, a second port, and an array of six-transistor memory cells (19). A first memory access is initiated upon a rising edge of a first clock signal (ACLK) received onto the first port. A second memory access is initiated in response to a rising edge of a second clock signal (BCLK) received onto the second port. If the rising edge of the second clock signal occurs within a first period of time, then the second memory access is initiated immediately following completion of the first memory access in pseudo-dual port fashion. If the rising edge of the second clock signal occurs later within a second period of time, then the second memory access is delayed until after a second rising edge of the first clock signal. The durations of the first and second memory accesses do not depend on the duty cycles of the clock signals.
Full Text PLEASE SEE THE ATTACHED SPECIFICATION [PDF VERSION]

Documents:

1204-MUMNP-2008-ABSTRACT(12-6-2013).pdf

1204-MUMNP-2008-ABSTRACT(16-6-2008).pdf

1204-MUMNP-2008-CLAIMS(16-6-2008).pdf

1204-MUMNP-2008-CLAIMS(AMENDED)-(12-6-2013).pdf

1204-MUMNP-2008-CLAIMS(MARKED COPY)-(12-6-2013).pdf

1204-MUMNP-2008-CORRESPONDENCE(15-5-2014).pdf

1204-MUMNP-2008-CORRESPONDENCE(24-11-2008).pdf

1204-MUMNP-2008-CORRESPONDENCE(6-9-2012).pdf

1204-MUMNP-2008-DESCRIPTION(COMPLETE)-(16-6-2008).pdf

1204-MUMNP-2008-DRAWING(12-6-2013).pdf

1204-MUMNP-2008-DRAWING(16-6-2008).pdf

1204-MUMNP-2008-EP DOCUMENT(12-6-2013).pdf

1204-MUMNP-2008-FORM 1(12-6-2013).pdf

1204-MUMNP-2008-FORM 1(16-6-2008).pdf

1204-MUMNP-2008-FORM 1(6-9-2012).pdf

1204-MUMNP-2008-FORM 13(6-9-2012).pdf

1204-MUMNP-2008-FORM 18(16-6-2008).pdf

1204-MUMNP-2008-FORM 2(COMPLETE)-(16-6-2008).pdf

1204-MUMNP-2008-FORM 2(TITLE PAGE)-(16-6-2008).pdf

1204-MUMNP-2008-FORM 26(12-6-2013).pdf

1204-MUMNP-2008-FORM 26(15-5-2014).pdf

1204-MUMNP-2008-FORM 26(16-6-2008).pdf

1204-MUMNP-2008-FORM 3(12-6-2013).pdf

1204-MUMNP-2008-FORM 3(16-6-2008).pdf

1204-MUMNP-2008-FORM 3(24-11-2008).pdf

1204-MUMNP-2008-FORM 5(12-6-2013).pdf

1204-MUMNP-2008-FORM 5(16-6-2008).pdf

1204-MUMNP-2008-FORM PCT-IB-304(12-6-2013).pdf

1204-MUMNP-2008-PETITION UNDER RULE-137(12-6-2013).pdf

1204-MUMNP-2008-REPLY TO EXAMINATION REPORT(12-6-2013).pdf

1204-MUMNP-2008-US DOCUMENT(12-6-2013).pdf

1204-MUMNP-2008-WO INTERNATIONAL PUBLICATION REPORT(16-6-2008).pdf

1204-MUMP-2008-COPY OF US ASSIGNMENT(21-8-2008).pdf

1204-MUMP-2008-CORRESPONDENCE(21-8-2008).pdf

abstract1.jpg

Drawings.pdf

Form-1.pdf

Form-3.pdf

Form-5.pdf


Patent Number 260794
Indian Patent Application Number 1204/MUMNP/2008
PG Journal Number 21/2014
Publication Date 23-May-2014
Grant Date 22-May-2014
Date of Filing 13-Jun-2008
Name of Patentee QUALCOMM INCORPORATED
Applicant Address 5775 MOREHOUSE DRIVE, SAN DIEGO, CALIFORNIA 92121-1714,
Inventors:
# Inventor's Name Inventor's Address
1 JUNG, CHANG HO 12473 RUETTE ALLIANTE, SAN DIEGO, CALIFORNIA 92130,
PCT International Classification Number G11C7/10
PCT International Application Number PCT/US2006/061044
PCT International Filing date 2006-11-17
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 11/282,345 2005-11-17 U.S.A.