Title of Invention

SWITCHING CIRCUIT WHICH IS USED TO OBTAIN A DOUBLED DYNAMIC RANGE

Abstract It permits switching signals with a peak level equal to the source voltage by means of a transistor, the peak to peak level being double the source. It is characterized by the connection of a transistor (17) to the signal source (10) and a load (19) by means of a series of capacitors (11, 18), resistors (15, 16) and an inductor (12) that form the circuit of the invention, and by the application of two complementary control voltages (13 and 14) in order to control the off and on states of the switch circuit.
Full Text 2
SWITCHING CIRCUIT WHICH IS USED TO OBTAIN A DOUBLED DYNAMIC
RANGE
OBJECT OF THE INVENTION
As expressed in the title of this specification, the
present invention refers to a switch circuit to obtain a
duplicate dynamic range that is applicable to multiple
communications systems, and especially applicable to
communications systems wherein the output voltage is higher than
the source voltage.
Signals with a dynamic range up to double the value of the
source voltage can be switched with the switch circuit of the
invention.
BACKGROUND OF THE INVENTION
In most electronic systems it is advantageous to have means
to isolate or connect a load to a signal source. This is
especially advantageous in telecommunications systems, for the
injection as well as for the extraction of the signal from the
communications means.
These functions are carried out in the prior art by means
of switches and multiple ways of carrying them out are known,
with MOSFET transistors as well as with BJT transistors.
Several examples of switches would be those disclosed in
the patents US200311787 "Switch control circuit" and EP1246363
"High frequency switch circuit, and communications terminal
using the same" that describe switch circuits that solve
problems specific to the use thereof. The problem of curling is
solved in the first patent within the band of the insertion
losses in the active state of a high frequency switch, whereas
the second patent solves the problem of uncontrolled switching
due to noise in the load, for example, due to lightning or other
electric phenomena. None of these two patents anticipate or
solve the technical problem in this invention, that is to say,
switching signals at peak to peak level double the source.

3
In general, switches known in the prior part suffice in
multiple uses of telecommunications systems since the output
signal of the amplifier will have a maximum peak-peak level that
will be equal to the source voltage. A switching step with a
higher voltage range is unnecessary. Unfortunately, this is not
valid in the case wherein some power combination circuit, such
as, the power combiner circuit described in patent
WO2004/038911, is used. In this case, the output peak-peak
voltage can clearly be higher than the source voltage. The only
solution in the prior art would be to increase the source
voltage, which would imply a higher expense in the manufacture
and use of this type of circuit.
The switch circuit of the invention makes it possible to
achieve output peak to peak voltage ranges higher than the
source voltage (doubling this range) with the need to alternate
said source voltage, which implies a very effective solution
from an economic point of view for switching high power signals.
DESCRIPTION OF THE INVENTION
In order to achieve the objectives and to avoid the
drawbacks indicated above, the invention consists of a switch
circuit that comprises a transistor with three terminals, an
inductor, two resistors and two capacitors, located between a
source signal (Vsource) and an external load (Zload) . This circuit
is characterized by connecting the voltage source (Vsource) to the
first terminal of the transistor by means of a capacitor, by
connecting an input of complementary control voltage (VControl)
to the first terminal of the transistor by means of an inductor,
by connecting an input of the control voltage (Vcontrol) to the
second terminal of the transistor by means of a resistor, by
connecting the same input for the control voltage (Vcontrol) to
the third terminal of the transistor by means of another
resistor, and by connecting the third terminal of the transistor
to the load (Zload) by means of a capacitor. Likewise, a control
voltage (Vcontrol) and its complementary voltage (VControl) are

4
applied. Thanks to all this, a switch circuit with a dynamic
range that is double the range of source voltage is obtained.
In an embodiment of the invention, the transistor used is a
reverse biased BJT transistor, whereas in another embodiment,
the transistor used is a direct biased BJT transistor.
The invention provides for, in an alternate embodiment,
that the transistor used is an N channel MOSFET transistor, and
in another alternative embodiment, that the transistor used is a
P channel MOSFET transistor.
For the cases wherein the transistor used is an BJT NPN or
N channel MOSFET transistor, when the control voltage (Vcontrol)
is equal to the highest limit of the source voltage, the
complementary control voltage (VControl) is equal to the lowest
limit of the source voltage and the switch is on, whereas when
the control voltage (Vcontrol) is equal to the lowest limit, the
complementary control voltage (VControl) is equal to the highest
limit and the switch is off.
With regard to the cases wherein the transistor used is a
BJT PNP or a P channel MOSFET transistor, when the control
voltage (Vcontrol) is equal to the highest limit of the source
voltage, the complementary control voltage {VControl) is equal to
the lowest limit of the source voltage and the switch is off,
whereas when the control voltage (Vcontrol) is equal to the lowest
limit, the complementary control voltage {VControl) is equal to
the highest limit and the switch is on.
On the other hand, in one embodiment, the source applied to
the switch circuit with direct bias BJT, with reverse bias BJT
or else with a MOSFET transistor is unipolar, whereas in another
embodiment said source is bipolar, maintaining the usefulness of
the circuit in any case, in other words, achieving a dynamic
switching range that is double the source voltage range.
Hereinafter to provide a better understanding of this
specification and forming an integral part thereof, some figures
wherein the object of the invention has been represented in an

5
illustrative and non-restrictive manner are attached hereto.
BRIEF DESCRIPTION OF THE FIGURES
Figure 1 is a diagram of an ideal voltage controlled
switch.
Figure 2 shows the characteristic curve of an ideal voltage
controlled switch.
Figure 3 is a conventional diagram of a switch made by a
MOSFET transistor.
Figure 4 shows the characteristic curve of the switch with
MOSFET indicated in figure 3.
Figure 5 is a conventional diagram of a switch carried out
by a BJT transistor.
Figure 6 shows the characteristic curve of the switch with
BJT indicated in figure 5.
Figure 7 shows the linear area of the characteristic curve
of a switch with BJT for a certain bias.
Figure 8 is a general diagram of the switch circuit of the
invention.
Figure 9 shows a comparative graph of the switching range
in a conventional switch and the double range switch of the
invention.
Figure 10 is a particular embodiment of the invention
wherein the transistor used is a reverse biased BJT NPN
transistor.
Figure 11 is a particular embodiment wherein the transistor
used is a direct biased BJT NPN transistor.
Figure 12 is a particular embodiment wherein the transistor
used is a direct biased BJT PNP transistor.
Figure 13 is a particular embodiment wherein the transistor
used is a reverse biased BJT PNP transistor.
Figure 14 is a particular embodiment wherein the transistor
used is an N channel MOSFET transistor.
Figure 15 is a particular embodiment wherein the transistor
used is a P channel MOSFET transistor.

6
DESCRIPTION OF SEVERAL EMBODIMENTS OF THE INVENTION
A description of several embodiments of the invention is
made hereinafter, making reference to the numbers used in the
figures.
Before dealing with the specific case of the double dynamic
range switch circuit, it is necessary to present the function
and usefulness of switches. Use of switches, whose main function
is to isolate at certain moments and to connect at other moments
a load to a signal source, is known in the prior art. Figure 1
is a diagram of an ideal voltage controlled switch. In this
figure, terminals (1) and (2) are the terminals to switch
whereas (3) is the control terminal.
This switch can be found in two different states depending
on the state of the control terminal (3). When the switch is on,
the voltage difference between points 1 and 2 is zero and the
current that passes through (I1) can have any value depending on
the source voltage and on the load.

When the switch is off, the current is zero and the voltage
between the two terminals can have any value:


Figure 2 shows the characteristic curve of an ideal voltage
controlled switch. The voltages V31 and V31 in said figure are
between the off values V3 and on values V3, and from these values
one can see the ratio between the voltage between the terminals
(1) and (2) (Vi2) and the current in point 1 (I1) .

A realer approximation to the ideal switch shown above can
be carried out by means of a MOSFET transistor, as shown in
figure 3. The voltages and currents of the different terminals
in this figure correspond with the voltages of the terminals of
the transistor (Drain D, Supply S and Gate G):
In an n channel MOSFET, the voltage at the gate (VG) should
exceed the drain or source voltage in the threshold value (VT)
so that the switch is on. In this way, if the source voltage

7
(Vs) is zero, the switch will be on when VGS>VT, whereas it will
be off when VGT In this case the input voltage range in the terminals (4)
(D) and (5) (S) depends on the control voltage used in terminal
6 (G) . Assuming that the control voltage is +vdd when it is on
and -Vdd when it is off, the highest and lowest limits of the
input voltaqe range will be the following:

On the one hand, the highest limit of the voltage range is
determined by the state wherein the switch is on. If the input
voltage into the switch exceeds this value, the switch will no
longer be on since the condition VGS > vt (vGD > VT) is not met:

On the other hand, the lowest limit of the voltage range is
determined by the state wherein the switch is off. If the input
voltage into the switch exceeds this value, the switch will no
longer be off since the condition VGs > vt (vGD
In this case, the total range of the switch carried out
with a MOSFET transistor is [-Vdd-VT, +Vdd - VT] (approximately
[-Vdd, +Vdd]) with a dual source ±Vdd.
Figure 4 shows the characteristic curve of this switch. As
one can see, there are obvious differences with the ideal switch
such as the resistance when the switch is on is not zero and the
isolation is not infinite when the switch is off.
On the other hand, the switch can be implemented with a BJT
transistor as one can see in figure 5. In this case, the
voltages and currents of the different terminals correspond with
the voltages of the terminals of the BJT transistor (Collector
C, Emitter E and Base B):

In an BJT NPN, the voltage in the base (VB) must exceed the
emitter or collector voltage in the threshold value (VBesat) so

8
that the switch is on. In this way, if the emitter voltage (VE)
is zero, the switch will be on when VBE>VBesat and off when
VBE
The highest limit is determined by the state wherein the
switch is on. If the input voltage into the switch exceeds this
value, the switch will no longer be on since the condition
VBE>VBesat) is not met:

The lowest limit is determined by the state wherein the
switch is off. If the input voltage is lower than this value,
the switch will no longer be off since the condition VBE (VBC
Therefore, for the switch circuit already known in the
prior art with BJT transistor; the total range is [-VBeon,
Vcc-VBEsat] (approximately [0, +VCC]) with a unipolar +VCC source.
The characteristic curve of the switch in this case can be
seen in figure 6. This figure shows several curves for different
biases (VBE) . The fact that the source is not zero sticks out
therein, due to a certain offset voltage, which is negligible in
practice. Furthermore, the switch with BJT is not linear (which
limits the dynamic range) , it is not symmetric, and it needs a
certain current through the control terminal (IB) for which
reason the current that circulates through the two terminals to
switch will be different (Ic # IE) •
In general, and for uses in telecommunications that use
switches a design that keeps its operation in the almost linear
area is necessary. This can be seen in figure 7 wherein said
area has been squared in for a curve obtained for a certain bias
of the transistor.
In short, for a typical switch circuit with BJT it is
possible to switch signals with a maximum amplitude equal to


9
half the source voltage (peak-peak level equal to the source
voltage). There are multiple uses in telecommunications wherein
switching of signals with a higher amplitude must be carried
out, whereby in order to use this circuit the appropriate source
would have to be provided independently, with the subsequent
additional cost.
On the other hand, the circuit of the invention, in other
words, the duplicate dynamic range switch permits all of the
above-mentioned problems to be solved by achieving switching
signals with a peak level equal to the source voltage (peak-peak
level double the source) by means of a transistor. There are
multiple uses where this type of switch is used, but one of the
most appropriate ones is the switching of wide band and high
power signals with TDD (Time Division Duplex) technology.
A diagram of the switch of the invention can be seen in
figure 8. The circuit comprises a transistor (17), an inductor
(12), two resistors (15) and (16) and two capacitors (11) and
(18), located between a signal source (Vsource) (10) and an
external load (Zload) (19) . In order to clarify the connections,
the three terminals of the transistor (17) have been marked in
this figure with references (20), (21) and (22). In this circuit
the source signal (Vsource) (10) is connected to the first
terminal (20) of the transistor (17) by means of a capacitor
(11), the input for the complementary control voltage (VControl
(13) to the first terminal (20) of the transistor (17) by means
of an inductor (12) , the input for the control voltage (Vcontrol)
(14) to the second terminal (21) of the transistor (17) by means
of a resistor (15) , the input for the control voltage (Vcontrol)
(14) to the third terminal (22) of the transistor (17) by means
of another resistor (16) , and the third terminal (22) of the
transistor (17) to the load (Zload) (19) by means of a capacitor
(18).
In this figure (VControl) (13) is the complementary voltage
of the control voltage (Vcontrol) (14) inasmuch as when one of said

10
voltages is an end of the source (Vsource), the other voltage is
the other end of the source voltage.
If a unipolar source voltage (Vcontrol) of +VCC is assumed,
analysis similar to the one made for basic switches and the on
and off states thereof can be carried out.
The switch is on when the control voltage (Vcontrol) (14) is
equal to the top extreme of the source voltage (+Vcc) , whereas
the complementary voltage ((VControl) (13) is equal to the
bottom extreme of said source (0).
As of this general circuit, it is possible to carry out
multiple embodiments replacing the generic transistor by a BJT
or MOSFET transistor. In order to explain the operation of the
circuit of figure 8 a BJT transistor put in place instead of the
generic transistor will be used. In this case, the voltages in
direct current the terminals of the BJT transistor of the switch
circuit of the invention are the following:

In order to know the dynamic range of the switch, the
voltages of the collector and the emitter can be split up into
the direct current (VDC) and alternating current (VAC) components
thereof, since the switch is decoupled into alternating current
by means of capacitors (11) and (18) , that is to say:

Both voltages are equal when the switch is on, ignoring the
voltage VCE . The condition so that the switch is kept on is the
following:

From these expressions the highest limit of the alternating
current input voltage coming from the source is obtained:


11
Hence, the maximum voltage that can be switched will be
approximately the source voltage +VCC.
On the other hand, the switch will be off when the control
voltage (VcontEOl) (14) is equal to the lowest limit of the source
voltage (0) and {(VControl) (13) is equal to the highest limit of
the source (+VCC) .
The voltages in direct current that appear in the terminals
of the transistor in this case are the following:

In this case, in order to know the dynamic range of the
switch when it is off, it is necessary to obtain the bias in
direct current of the collector. This voltage in the moment, in
which the transistor is no longer off and goes on, it becomes
equal to the voltage of the emitter. Therefore, in order to
calculate the limit between off state and the on state when the
switch is off, the voltage of the collector is equal to the
voltage of the emitter.
In the same way that for the on state, the voltages of the
collector and the emitter can be split up in the two components
thereof, direct current (VDC) and alternating current (VAC) :

So that the switch does not stop being off, it is necessary
that the following condition is maintained:

Expanding this condition the lowest limit of the
alternating current input voltage coming from the source is
obtained:

Hence, the minimum voltage that will be able to be switched
is approximately the source voltage but with a negative sign
(-Vcc) .

12
In short, the dynamic range of the source voltage that is
capable of switching the circuit of the invention is [-VCC( +VCC]
that is double the source voltage (that since it is unipolar it
is [0, +VCC]) . With this one concludes that the invention manages
to double the dynamic switching range with respect to other
switch circuits known in the prior art.
Figure 9 shows a comparison between the input voltage
limits in the case of a conventional switch and in the case of
the switch of the invention. The source in both cases is
unipolar from 0 to +Vcc. As shown in the figure, the
conventional switch has a range between its on and off limits
equal to the source, whereas for the circuit of the invention,
the range is double this value, thanks to the correct use of the
control signals that cause the change of bias in the switching
transistor.
On the other hand, the BJT transistor, due to its
construction, is not perfectly symmetric, but for a use such as
switching it can assume its symmetry from the point of view of
the bias. In other words, the bias can be carried out from the
Base to the Emitter (as traditionally done) or from the Base to
the Collector, without there being big differences of
performance as to the use thereof in the switching process.
Better results will be obtained with one configuration or the
other depending on the characteristics themselves of the
transistor used, although said differences will be minimal.
With the bias between the Base and the Collector, when the
switch is on, the transistor, in direct current (that is to say,
statically), it will be biased in reverse saturation. Once the
alternating current signal appears from the source, the bias of
the transistor will change from reverse saturation to direct
saturation alternatively depending on the input voltage into the
switch (or of the direction of the current in the load) . The
latter also takes place in the case of using traditional bias of
the transistor between the Base and the Emitter.
Figure 10 shows the switch circuit with a duplicate dynamic

13
range of the invention, but with a reverse biased BJT NPN
transistor (23). The operation and characteristics are
essentially the same as for the above-shown switch, which can be
demonstrated by replacing the voltage of the Emitter by the
voltage of the Collector in the above operating equations, as
far as the dynamic input range of the switch is concerned.
Figure 11 shows another embodiment of a switch according to
the invention with a BJT NPN transistor (24) but this time
directly biased, whereas figure 12 shows an embodiment wherein
the transistor used is a directly biased BJT NPN (25) , and
figure 13 is another embodiment wherein the transistor used in a
reverse biased BJT NPN (16).
Finally, figures 14 and 15 show particular embodiments
wherein a MOSFET transistor is used. Figure 14 shows an
embodiment with an N channel MOSFET transistor (27), whereas
figure 15 shows an embodiment with a P channel MOSFET transistor
(28).

14
CLAIMS
1.- Switch circuit to obtain a duplicate dynamic range,
which comprises a transistor (17) with three terminals (20, 21
and 22) , an inductor (12) , two resistors (15 and 16) and two
capacitors (11 and 18), located between a signal source (VSOURCE)
(10) and an external load (Zload) (19) characterized in that it
comprises:
- connecting the signal source (Vsource) (10) to the first
terminal (20) of the transistor by means of a capacitor (11);
- connecting an input of complementary control voltage
(VControl) (13) to the first terminal (20) of the transistor (17)
by means of an inductor (12);
- connecting an input of control voltage (Vcontrol) (14) to
the second terminal (21) of the transistor (17) by means of a
resistor (15);
- connecting an input of control voltage (Vcontrol) (14) to
the third terminal (22) of the transistor by means of another
resistor (16) ;
- connecting the third terminal (22) of the transistor (17)
to the load (Zload) by means of a capacitor (18); and
- applying a control voltage (Vcontroi) (14) and its
complementary control voltage (VControl) (13) to the switch
circuit;
in order to achieve a dynamic range in the switching double the
range of the source voltage.
2.- Switch circuit to obtain a duplicate dynamic range,
according to claim 1, characterized in that the transistor used
is a reverse biased BJT transistor.
3.- Switch circuit to obtain a duplicate dynamic range,
according to claim 1, characterized in that the transistor used
is a direct biased BJT transistor.
4.- Switch circuit to obtain a duplicate dynamic range,
according to claim 1, characterized in that the transistor used
is an N channel MOSFET transistor.

15
5.- Switch circuit to obtain a duplicate dynamic range,
according to claim 1, characterized in that the transistor used
is a P channel MOSFET transistor.
6.- Switch circuit to obtain a duplicate dynamic range,
according to claims 2, 3 or 4, characterized in that for the
cases wherein the transistor is a BJT NPN or N channel MOSFET
one, when the voltage control (Vcontrol) (14) is equal to the
highest limit of the source voltage, the complementary control
voltage (VControl) (13)is equal to the lowest limit of the source
supply and the switch is on, whereas when the voltage control
(Vcontroi) (14) is equal to the lowest limit, the complementary
control voltage (VControl) (13) is equal to the highest limit and
the switch is off.
7.- Switch circuit to obtain a duplicate dynamic range,
according to claims 2, 3 or 5, characterized in that for the
cases wherein the transistor is a BJT PNP or P channel MOSFET,
when the voltage control (Vcontrol) (14) is equal to the highest
limit of the source voltage, the complementary control voltage
(VControl) (13) is equal to the lowest limit of the source
voltage and the switch is off, whereas when the control voltage
(VCOntrol) (14) is equal to the lowest limit, the complementary
control voltage (VControl) (13) is equal to the highest limit and
the switch is on.
8.- Switch circuit to obtain a duplicate dynamic range,
according to any of the above claims, characterized in that a
unipolar source is applied to the switch circuit.
9.- Switch circuit to obtain a duplicate dynamic range,
according to claims 1 to 7, characterized in that a bipolar
+ source is applied to the switch circuit.

1
ABSTRACT
SWITCHING CIRCUIT WHICH IS USED TO OBTAIN A DOUBLED DYNAMIC
RANGE
It permits switching signals with a peak level equal to the
source voltage by means of a transistor, the peak to peak level
being double the source.
It is characterized by the connection of a transistor (17)
to the signal source (10) and a load (19) by means of a series
of capacitors (11, 18), resistors (15, 16) and an inductor (12)
that form the circuit of the invention, and by the application
of two complementary control voltages (13 and 14) in order to
control the off and on states of the switch circuit.

Documents:

02213-kolnp-2007-abstract.pdf

02213-kolnp-2007-assignment.pdf

02213-kolnp-2007-claims.pdf

02213-kolnp-2007-correspondence others 1.1.pdf

02213-kolnp-2007-correspondence others.pdf

02213-kolnp-2007-description complete.pdf

02213-kolnp-2007-drawings.pdf

02213-kolnp-2007-form 1.pdf

02213-kolnp-2007-form 3.pdf

02213-kolnp-2007-form 5.pdf

02213-kolnp-2007-gpa.pdf

02213-kolnp-2007-international publication.pdf

2213-KOLNP-2007-(07-02-2013)-CORRESPONDENCE.pdf

2213-KOLNP-2007-(07-02-2013)-OTHERS.pdf

2213-KOLNP-2007-(15-05-2014)-ABSTRACT.pdf

2213-KOLNP-2007-(15-05-2014)-CLAIMS.pdf

2213-KOLNP-2007-(15-05-2014)-CORRESPONDENCE.pdf

2213-KOLNP-2007-(15-05-2014)-DESCRIPTION (COMPLETE).pdf

2213-KOLNP-2007-(15-05-2014)-DRAWINGS.pdf

2213-KOLNP-2007-(15-05-2014)-EXAMINATION REPORT REPLY RECIEVED.PDF

2213-KOLNP-2007-(15-05-2014)-FORM-1.pdf

2213-KOLNP-2007-(15-05-2014)-FORM-2.pdf

2213-KOLNP-2007-(15-05-2014)-FORM-3.pdf

2213-KOLNP-2007-(15-05-2014)-FORM-5.pdf

2213-KOLNP-2007-(16-11-2011)-ASSIGNMENT.pdf

2213-KOLNP-2007-(16-11-2011)-CORRESPONDENCE.pdf

2213-KOLNP-2007-(20-05-2014)-CORRESPONDENCE.pdf

2213-KOLNP-2007-(20-05-2014)-OTHERS.pdf

2213-KOLNP-2007-(22-05-2013)-CORRESPONDENCE.pdf

2213-KOLNP-2007-ASSIGNMENT 1.1.pdf

2213-KOLNP-2007-CORRESPONDENCE 1.1.pdf

2213-KOLNP-2007-FORM 1 1.1.pdf

2213-KOLNP-2007-FORM 13.pdf

2213-kolnp-2007-form 18.pdf

2213-KOLNP-2007-FORM 6.pdf

2213-KOLNP-2007-PA.pdf

abstract-02213-kolnp-2007.jpg

ABSTRACT.pdf

Application Form 1.pdf

Petition for condonation for Form-3.pdf

Response.pdf

Spec.pdf

Updated Form 3.pdf

We Claim-15397.pdf


Patent Number 264404
Indian Patent Application Number 2213/KOLNP/2007
PG Journal Number 01/2015
Publication Date 02-Jan-2015
Grant Date 26-Dec-2014
Date of Filing 15-Jun-2007
Name of Patentee DISENO DE SISTEMAS EN SILICIO, S.A.
Applicant Address CHARLES ROBERT DARWIN N°2, PARQUE TECNOLOGICO, E-46980, PATERNA (VALENCIA)
Inventors:
# Inventor's Name Inventor's Address
1 BLASCO CLARET, JORGE VICENTE GUARDIA CIVIL, 23-2°-PUERTA 38, E- 46020, VALENCIA
2 GONZALEZ MORENO, JOSE LUIS AVDA. CAMI NOU, 29-PUERTA 5, E-46009, VALENCIA, SPAIN
3 ANDRES NAVARRO, FRANCISCO JOSE LUIS OLIAS, 55-8°, E-46006, VALENCIA, SPAIN
4 CAMPS SOIANO, JOSE LUIS COLON 4, E-46950, XIRIVELLA (VALENCIA), SPAIN
PCT International Classification Number H03K17/10
PCT International Application Number PCT/ES2005/000575
PCT International Filing date 2005-10-26
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 P200402748 2004-11-16 Spain