Title of Invention

ARRANGEMENT AND METHOD FOR CONVERTING A DIGITAL SIGNAL WITH A LARGE VOLTAGE SWING INTO A DIGITAL SIGNAL WITH A VOLTAGE SWING WHICH IS SMALLER THAN THE LATTER

Abstract

The invention relates, inter alia, to an arrangement (10) for converting a first digital signal *Uh) with a first voltage swing into a second digital signal (Un) with a voltage swing which is smaller than the first voltage swing. The invention provides a threshold value detection device (30) which compares an input signal, which is applied to the input and corresponds to the first digital signal or has been formed with the latter, with a threshold value (Uref) and which if the input signal exceeds the threshold value- generates a pulse sequence (PI) comprising switch-on and switch off pulses. A DC isolation device (40) which is conneced to the output (A30) of the threshold value detection device (30) of the threshold value detection device (30) forwards the pulse sequence (PI), with potential isolation, to a signal recovery device (50) which generates the second digital signal using the pulse sequence (P2) which is applied to the signal out put (A50) of the DC isolation device.

Full Text

Description Arrangement and method for converting a digital signal with a large voltage swing into a digital signal with a voltage swing which is smaller than the latter The invention relates to an arrangement for converting a first digital signal - referred to below as digital high-voltage signal for short - with a first voltage swing into a second digital signal - referred to below as digital low-voltage signal for short - with a second voltage swing which is smaller than the first voltage swing. In this context, the terms high- voltage signal and low-voltage signal only express the relative voltage ratio between the two signals and do not relate to absolute voltage ranges; the absolute voltage range is not important for the invention; for example, the two signals may each be in a voltage range of between 0 and 5 V or else in a voltage range of several hundred volts. For example, the high- voltage signal may have a voltage swing of between 0 and 10- 300 V and the low-voltage signal may be in a range of between 0 and 5 V. In this case, the term voltage swing should be understood as meaning the difference between the maximum voltage value and the minimum voltage value of the respective signal. An arrangement for converting a digital high-voltage signal into a digital low-voltage signal may be formed, for example, by a resistive voltage divider having at least two non-reactive resistors which are connected in series. If a digital high- voltage signal is externally applied to the series circuit, a digital voltage signal can be tapped off from each of the non- reactive resistors connected in series, which voltage signal has a smaller voltage swing than the digital high-voltage signal applied to the input. However, such an arrangement has the disadvantage that relatively high electrical losses occur since the digital high-voltage signal is always applied to the series circuit comprising the non-reactive individual resistors. The invention is based on the object of specifying an arrangement for converting a digital high-voltage signal into a digital low-voltage signal, in which as small electrical losses as possible occur. In addition, the intention is to simultaneously achieve DC isolation between the digital high- voltage signal and the digital low-voltage signal in a relatively simple manner. According to the invention, this object is achieved by means of an arrangement having a threshold value detection device which compares an input signal, which is applied to the input and corresponds to the digital high-voltage signal or has been formed using the latter, with a threshold value and which - if the input signal exceeds the threshold value - generates a pulse sequence comprising switch-on and switch-off pulses. The switch-on pulses - have a predefined switch-on duration and a predefined switch-on amplitude and the switch-off pulses have a predefined switch-off duration and a predefined switch-off amplitude. In this case, the switch-off amplitude is smaller than the switch-on amplitude. In addition, the arrangement according to the invention has a DC isolation device which is connected to the output of the threshold value detection device and forwards the pulse sequence from the threshold value detection device, with electrical isolation, to a signal output of the DC isolation device. The invention also provides a signal recovery device which is connected to the DC isolation device and generates the digital low-voltage signal using the pulse sequence which is applied to the signal output of the DC isolation device. A fundamental advantage of the arrangement according to the invention can be seen in the fact that only relatively small electrical losses occur in said arrangement. This is because a pulse sequence is generated in the arrangement according to the invention if the digital high-voltage signal has a binary logic "1"; this makes it possible to operate the DC isolation device and the signal recovery device in an electrically active manner during a logic one only when the pulse sequence generates switch-on pulses rather than permanently. During the switch-off pulses, the DC isolation device may be deactivated, as a result of which the power consumption of the entire arrangement is reduced. In this case, the power consumption of the arrangement is determined by the ratio of the switch-on duration of the switch-on pulses relative to the switch-off duration of the switch-off pulses. Another fundamental advantage of the arrangement according to the invention can be seen in the fact that DC decoupling is achieved between the digital high-voltage signal and the digital low-voltage signal as a result of the DC isolation device; electrical losses caused by the DC isolation device are small in this case since - as explained - the latter is electrically situated between the threshold value detection device, which is used to generate the pulse sequence having the switch-on pulses and the switch-off pulses, and the signal recovery device and is thus operated only while switch-on pulses are present. The digital high-voltage signal is preferably used to supply power to the threshold value detection device; for this purpose, a voltage regulator is preferably connected to the threshold value detection device, the digital high-voltage signal being applied to the input of said voltage regulator and said voltage regulator using this high-voltage signal to form a supply- voltage for the threshold value detection device. The voltage regulator is particularly preferably a step-down controller which ensures that the supply voltage for the threshold value detection device has a smaller voltage swing than the digital high-voltage signal at the input of the voltage regulator. The voltage regulator is preferably used to set the supply voltage for the threshold value detection device in such a manner that it has an electrical power loss which is as minimal as possible overall. In order to ensure that the threshold value detection device, the DC isolation device and the downstream signal recovery device overall generate as little power loss as possible, it is considered to be advantageous if the switch-off amplitude of the switch-off pulses is as small as possible and is ideally 0 V. The signal recovery device is particularly preferably configured in such a manner that it uses the pulse sequence applied to the signal output of the DC isolation device to generate the digital low-voltage signal in such a manner that the latter has a signal profile which is proportional to the signal profile of the digital high-voltage signal, apart from any temporal offset. The binary information contained in the digital low-voltage signal particularly preferably corresponds to that in the digital high-voltage signal. The signal recovery device may be formed, for example, by an integrating element, for example by a corresponding operational amplifier circuit, or may comprise such an element. Alternatively or additionally, the signal recovery device may also have a microprocessor circuit which is used to form the low-voltage signal, the signal profile of which corresponds to that of the digital high-voltage signal, from the pulse sequence from the threshold value detection device. The invention also relates to a method for converting a first digital signal (high-voltage signal) into a second digital signal (low-voltage signal) with a smaller voltage swing. In this respect, the invention is based on the object of specifying a method in which as little power loss as possible is generated during conversion and in which DC isolation is nevertheless achieved between the high-voltage signal at the input and the low-voltage signal at the output. According to the invention, this object is achieved by virtue of the fact that the first digital signal is compared with a threshold value, that, if the first digital signal exceeds the threshold value, a pulse sequence comprising switch-on and switch-off pulses is generated, the switch-on pulses having a predefined switch-on duration and a predefined switch-on amplitude and the switch-off pulses having a predefined switch- off duration and a predefined switch-off amplitude, and the switch-off amplitude being set to be smaller than the switch-on amplitude, that the pulse sequence is subjected to electrical isolation so as to form an electrically isolated pulse sequence, and that the electrically isolated pulse sequence is used to generate the second digital signal. Advantageous refinements of the method according to the invention are specified in subclaims. As regards the advantages of the method according to the invention and the advantages of advantageous refinements of the method according to the invention, reference is made to the statements made above in connection with the arrangement according to the invention. The invention is explained in more detail below using exemplary embodiments. In this case, by way of example: figure 1 shows a block diagram of an exemplary embodiment of an arrangement for converting a digital high-voltage signal into a digital low-voltage signal, figure 2 shows the temporal profile of the signals occurring in the arrangement according to figure 1, figure 3 shows an exemplary embodiment of an electrical circuit, the function of which corresponds to the block diagram according to figure 1, figure 4 shows an exemplary embodiment of a signal recovery device for the arrangement according to figures 1 and 3, and figure 5 shows another exemplary embodiment of a signal recovery device for the arrangement according to figures 1 and Figure 1 illustrates an arrangement 10 for converting a first digital binary signal - referred to below as digital high- voltage signal Uh - into a second digital binary signal - referred to below as low-voltage signal Un for short. The digital high-voltage signal Uh has, for example, a voltage Uh of between 10 V and 300 V in the case of a logic or binary "one" and a voltage of ze2:o volts in the case of a logic or binary "zero". It is assumed below by way of example that the voltage Uh is 300 volts for a logic "one". On the input side, the arrangement 10 comprises a voltage regulator 20 whose signal input E20 has the digital high- voltage signal Uh applied to it. The voltage regulator 20 uses the digital high-voltage signal Uh applied to the input to generate a supply voltage Uv and outputs the latter at an output A20. A voltage supply connection V30 of a threshold value detection device 30 is connected to the output A20 of the voltage regulator 20. The supply voltage Uv generated by the voltage regulator 20 is used to supply the threshold value detection device 30 with electrical power for its operation. In addition, the threshold value detection device 30 has a signal input E30 which has the digital high-voltage signal Uh applied to it. A DC isolation device 40 whose signal output A40 is connected to a signal recovery device 50 is arranged downstream of an output A30 of the threshold value detection device 30. The signal recovery device 50 generates the digital low-voltage signal Un at the output. The arrangement according to figure 1 can be operated as follows: If an input voltage which exceeds a minimum voltage (for example at least 5 V) that has been predefined for operation of the voltage regulator 20 is applied to the input E20 of the voltage regulator 20, the voltage regulator 20 is activated. During operation of the voltage regulator 20, the latter generates, at its output A20, the supply voltage Uv which, irrespective of the specific level of the high-voltage signal Uh, is largely constant on account of the regulator properties of the voltage regulator 20. The output voltage Uv may. be, for example, 5 V, to be precise irrespective of whether the high- voltage signal Uh generates a voltage of 10 volts or 300 volts in the case of a logic one. As soon as the supply voltage Uv is provided by the voltage regulator 20 at the voltage supply connection V30 of the threshold value detection device 30, the threshold value detection device. 30 is also activated. This results in the threshold value detection device 30 comparing the digital high- voltage signal Uh applied, to its signal input E30 with a threshold value (for example at least 5 V) which has been firmly predefined or firmly set in the threshold value detection device 30. If the digital high-voltage signal Uh. exceeds this threshold value, the threshold value detection device 30 generates a pulse sequence P1 comprising a multiplicity of switch-on and switch-off pulses which alternate; this is illustrated in figure 2. In this case, the switch-on pulses have a predefined switch-on duration and a predefined switch-on amplitude; a corresponding situation applies to the switch-off pulses which likewise have a predefined switch-off duration and a predefined switch-off amplitude. For example, the threshold value detection device 30 generates a pulse sequence having switch-on pulses which have a switch-on amplitude Ae of 5 V and a switch-on duration Tein of one millisecond, for example. The switch-off pulses have, for example, a switch-off amplitude Aa of 0 V and a switch-off duration Taus of 1 ms. In contrast, if the digital high-voltage signal Uh undershoots the threshold value predefined in the threshold value detection device 30, the threshold value detection device 30 preferably generates a DC voltage which is as small as possible at the output, for example a DC voltage of 0 V. In this case, only a single voltage potential (for example of 0 V) rather than a pulse sequence is thus applied to the DC isolation device 40. When the described pulse sequence P1 is present, the DC isolation device 40 which is, for example, an optocoupler likewise generates a pulse sequence at its signal output A40, which pulse sequence is DC-isolated from the pulse sequence P1 which is applied to the input and is formed by the threshold value detection device 30. Said pulse sequence has the amplitude Ae' and is denoted using the reference symbol P2 in figure 2. The pulse sequence P2 formed by the DC isolation device 4 0 passes to the signal recovery device 50 which uses the pulse sequence P2 applied to the input to form the digital low- voltage signal Un. For this purpose, the signal recovery device 50 generates, at the output, a signal having a logic binary "1" in the form of an output voltage of, for example, 5 V if a pulse sequence P2 having alternating switch-on and switch-off pulses is applied to the input; if, however, a pulse sequence is not applied because the DC isolation device 40 does not provide a corresponding pulse sequence P2, the signal recovery device 50 generates a logic binary "0", preferably with a voltage potential of 0 V, at its output A50. Figure 2 illustrates, by way of example, the temporal profile of the digital high-voltage signal Uh, of the pulse sequences P1 and P2 at the output of the threshold value detection device 30 and the DC isolation device 40, respectively, and of the resultant digital low-voltage signal Un. Figure 3 shows an exemplary embodiment of a specific circuitry implementation of the block diagram according to figure 1. The voltage regulator 20 which has the digital high-voltage signal Uh applied to its input can be seen. In addition, the threshold value detection device 30 which may comprise an operational amplifier 100, for example, can be seen. The digital high-voltage signal Uh is applied to one of the two signal inputs E1OOa of the operational amplifier 100. The other signal input E1OOb of the operational amplifier 100 is connected to a reference voltage Uref which determines the threshold value of the threshold value detection device 30, as described. A pulse sequence generator 110, which generates a pulse sequence comprising successive switch-on and switch-off pulses when a corresponding drive signal is applied by the operational amplifier 100, is connected to the output A100 of the operational amplifier 100. The pulse sequence formed by the pulse sequence generator 110 corresponds to the pulse sequence P1 illustrated in figure 2. The output A110 of the pulse sequence generator 110 is connected to an optocoupler 130 which forms the DC isolation device 40 according to figure 1. The signal recovery device 50, which generates the digital low-voltage signal Un from the pulse sequence P2 from.the optocoupler 130 which is applied to the input, is connected to the output A130 of the optocoupler. Figure 4 shows an exemplary embodiment of the signal recovery device 50 according to figures 1 and 3. A resistor R and a capacitor C can be seen, one input E210a of an operational amplifier 210 being connected to the point 200 at which said resistor and capacitor are connected. A reference voltage Uref2 (for example Uref2 = 2.5 V.) is applied to another input E210b of the operational amplifier 210. If a pulse sequence P2 is applied to the signal recovery device 50, the operational amplifier 210 generates a signal having a logic "1" at the output. If, however, only a potential of 0 V rather than a pulse sequence is applied to the input E50 of the signal recovery device 50, the operational amplifier 210 generates an output voltage Un of 0 V at the output A50. The circuit formed by the resistor R, the capacitor C and the operational amplifier 210 thus makes it possible to use the pulse sequence P2 applied to the input to generate a digital output signal Un which is proportional to the digital high- voltage signal Uh at the input of the threshold value detection device 30, apart from a phase shift or a temporal offset. Figure 5 shows another exemplary embodiment of a technical implementation of the signal recovery device 50 according to figures 1 and 3. A microprocessor device 300 which converts a pulse sequence P2, which is applied to the input, into a square-wave signal can be seen, the square-wave signal always having a logic "1" if alternating switch-on and switch- off pulses are applied to the input and otherwise having a logic "0". Patent claims 1. An arrangement (10) for converting a first digital signal (Uh) with a first voltage swing into a second digital signal (Un) with a voltage swing which is smaller than the first voltage swing, characterized by a threshold value detection device (30) which compares an input signal, which is applied to the input and corresponds to the first digital signal or has been formed using the latter, with a threshold value (Uref) and which - if the input signal exceeds the threshold value - generates a pulse sequence (P1) comprising switch-on and switch-off pulses, the switch-on pulses having a predefined switch-on duration (Tein) and a predefined switch-on amplitude (Ae) and the switch-off pulses having a predefined switch-off duration (Taus) and a predefined switch-off amplitude, and the switch-off amplitude being smaller than the switch-on amplitude, a DC isolation device (40) which is connected to the output (A30) of the threshold value detection device (30) and forwards the pulse sequence (P1) from the threshold value detection device, with electrical isolation, to a signal output (A4 0) of the DC isolation device, and a signal recovery device (50) which is connected to the DC isolation device and generates the second digital signal using the pulse sequence (P2) which is applied to the signal output (A50) of the DC isolation device. 2. The arrangement as claimed in claim 1, characterized in that a voltage regulator (20) is connected to the threshold value detection device, the first digital signal being applied to the input of said voltage regulator and said voltage regulator using this first digital signal to form a supply voltage (Uv) for the threshold value detection device. 3. The arrangement as claimed in claim 2, characterized in that the voltage regulator is a step-down controller which ensures that the supply voltage for the threshold value detection device has a smaller voltage than the first digital signal at the input of the voltage regulator. 4. The arrangement as claimed in one of the preceding claims, characterized in that the switch-off amplitude is zero volts. 5. The arrangement as claimed in one of the preceding claims, characterized in that the signal recovery device uses the pulse sequence applied to the signal output of the DC isolation device to generate the second digital signal in such a manner that the latter has a signal profile which is proportional to the signal profile of the first digital signal, apart from a temporal offset. 6. The arrangement as claimed in one of the preceding claims, characterized in that the signal recovery device is configured in such a manner that the binary information contained in the second digital signal corresponds to that in the first digital signal. 7. The arrangement as claimed in one of the preceding claims, characterized in that the signal recovery device comprises ah integrating element (R, C, 210). 8. The arrangement as claimed in one of the preceding claims 1-6, characterized in that the signal recovery device comprises a microprocessor circuit (300). 9. A method for converting a first digital signal (Uh) with a first voltage swing into a second digital signal (Un) with a voltage swing which is smaller than the first voltage swing, characterized in that the first digital signal is compared with a threshold value (Uref), in that, if the first digital signal exceeds the threshold value, a pulse sequence (P1) comprising switch-on and switch-off pulses is generated, the switch-on pulses having a predefined switch-on duration (Tein) and a predefined switch-on amplitude (Ae) and the switch-off pulses having a predefined switch-off duration (Taus) and a predefined switch-off amplitude, and the switch-off amplitude being set to be smaller than the switch-on amplitude, in that the pulse sequence (P1) is subjected to electrical isolation so as to form an electrically isolated pulse sequence (P2), and in that the electrically isolated pulse sequence (P2) is used to generate the second digital signal. 10. The method as claimed in claim 9, characterized in that the electrically isolated pulse sequence (P2) is used to generate the second digital signal in such a manner that the latter has a signal profile which is proportional to the signal profile of the first digital signal, apart from a temporal offset. The invention relates, inter alia, to an arrangement (10) for converting a first digital signal *Uh) with a first voltage swing into a second digital signal (Un) with a voltage swing which is smaller than the first voltage swing. The invention provides a threshold value detection device (30) which compares an input signal, which is applied to the input and corresponds to the first digital signal or has been formed with the latter, with a threshold value (Uref) and which if the input signal exceeds the threshold value- generates a pulse sequence (PI) comprising switch-on and switch off pulses. A DC isolation device (40) which is conneced to the output (A30) of the threshold value detection device (30) of the threshold value detection device (30) forwards the pulse sequence (PI), with potential isolation, to a signal recovery device (50) which generates the second digital signal using the pulse sequence (P2) which is applied to the signal out put (A50) of the DC isolation device.

Documents:

02987-kolnp-2008-abstract.pdf

02987-kolnp-2008-correspondence others.pdf

02987-kolnp-2008-description complete.pdf

02987-kolnp-2008-drawings.pdf

02987-kolnp-2008-form 1.pdf

02987-kolnp-2008-form 2.pdf

02987-kolnp-2008-form 3.pdf

02987-kolnp-2008-form 5.pdf

02987-kolnp-2008-gpa.pdf

02987-kolnp-2008-international publication.pdf

02987-kolnp-2008-international search report.pdf

02987-kolnp-2008-pct request form.pdf

02987-kolnp-2008-translated copy of priority document.pdf

2987-KOLNP-2008-(14-08-2013)-ABSTRACT.pdf

2987-KOLNP-2008-(14-08-2013)-ANNEXURE TO FORM 3.pdf

2987-KOLNP-2008-(14-08-2013)-CLAIMS.pdf

2987-KOLNP-2008-(14-08-2013)-CORRESPONDENCE.pdf

2987-KOLNP-2008-(14-08-2013)-DESCRIPTION (COMPLETE).pdf

2987-KOLNP-2008-(14-08-2013)-DRAWINGS.pdf

2987-KOLNP-2008-(14-08-2013)-FORM-1.pdf

2987-KOLNP-2008-(14-08-2013)-FORM-2.pdf

2987-KOLNP-2008-(14-08-2013)-OTHERS.pdf

2987-KOLNP-2008-(14-08-2013)-PETITION UNDER RULE 137.pdf

2987-KOLNP-2008-(30-04-2014)-ANNEXURE TO FORM 3.pdf

2987-KOLNP-2008-(30-04-2014)-CLAIMS.pdf

2987-KOLNP-2008-(30-04-2014)-CORRESPONDENCE.pdf

2987-kolnp-2008-form-18.pdf

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