| Title of Invention | AN OSCILLATOR CIRCUIT |
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| Abstract | The present invention relates to an oscillator circuit (200a, 200b, 300, 400) comprising a resonant element, an active element, a feedback loop, and an additional loop comprising a phase shifting element. |
| Full Text | TECHNICAL FIELD OF THE INVENTION The present invention relates to an oscillating electrical circuit having multiple loops. BACKGROUND OF THE INVENTION The basic concept of a single ended oscillator comprising an active element A and the feedback element β is illustrated in Fig. 5. To start and maintain an oscillation in an electrical oscillator, normally the output of an active element is fed back to the input of the active device by a feedback network, which creates a loop-gain larger than one. The feedback elements have normally narrow-band characteristics. Moreover, the oscillation frequency for the oscillator may be varied by electrically controlling the centre frequency for the feedback element. This is further illustrated in Figs, 1a and 1b for a differential realisation. To create an oscillator with low phase noise, fast switching of the active device(s) is/are advantageous. Moreover, the relation in time between the current injected by the active device into the resonant element and the voltage over the resonant element, as in Fig. 1a, is important if low phase noise is required. To achieve fast switching, the loop-gain may be increased by increasing the gain of the active device either by having a wider device, which is valid in the case of FET (Field Effect Transistor), or by increasing the bias current for the active device. However, increasing the power consumption is not desired and wider transistors will result in more parasitic capacitance, which counteracts fast switching. Moreover, it is not possible to control the phase of the injected current pulse in an optimal way with the common oscillator topologies shown in Figs, 1a and 1b. In Fig. 1a, the oscillator circuit 100a comprises two resonant elements 101a and 102a, which at a common terminal are fed from a supply voltage 110a and connected to the drains and gates of transistors T1a and T2a, respectively. Feedback element 103a is connected between the drain of transistor T1a and gate of transistor T2a and feedback element 104a is connected between the drain of T2a and gate of transistor T1a. Optionally, a voltage bias source 120a may be connected to the gates of the transistors T1a and T2a via an impedance element 105a. The sources of the transistors are AC grounded, optionally through a current bias source 130a. Fig. 1b illustrates another oscillator circuit 100b in which a resonant element 101b is connected to the drains of active elements T1b and T2b. Active elements comprising two transistors T3b and T4b are connected with gate and drain common to T1b and T2b, respectively. The drain of T3b is connected to the common gates of T4b and T2b while the drain of T4b is connected to the common gates of T3b and T1b, constituting the feedback. The circuit is fed with a supply voltage 110b through the sources of T3b and T4b. The sources of transistors T1b and T2b are grounded, optionally through a current bias source 130b. It is also possible to provide additional feedback elements in the circuit according to Fig. 1b. Moreover, the current source can be provided on top of the circuit. Prior art according to "Design Issues in CMOS Differential LC Oscillators", by A. Hajimiri et al, IEEE journal of Solid State Circuits, Vol. 34, No. 5, May 1999, discloses a topology for oscillators, in which fast switching and current pulse optimisation is achieved. However, this document is silence about the novel connection according to the present invention. SUMMARY OF THE INVENTION The objects of the present invention are to provide an oscillator with fast switching characteristics and current pulse optimisation. The presented invention allows realization in a very compact (and low parasitic) way. The characteristics will further allow very high frequency VCOs based on this topology. Thus, the invention according to a preferred embodiment will provide a faster or/and more optimised switching resulting in lower oscillator phase noise for a fixed bias current. In the preferred embodiment, the current between the source node and the ground obtains a lower amplitude for its DC component. For these reasons an oscillator circuit comprises a resonant element, an active element, a feedback loop, and an additional feedback loop comprising a phase shifting element. The resonant element is connected to a drain of the active element and the feedback loop is connected to gate of the active element and resonant element and the additional feedback loop is connected between drain and gate of the active element. The additional element may also be provided with supplementary amplification. According to one embodiment of the invention, the oscillator circuit further comprises: two resonant elements, having a first common terminal fed from a supply voltage and second terminals connected to the drains of first and second transistors, respectively provided as active elements, feedback elements connected between the drain of the first transistor and gate of the second transistor, and a feedback for each transistor comprising the phase shifting element. Preferably, the feedback comprises an amplifier and inverter networks connected between drain and gate of the first and second transistor, respectively. The sources of the transistors may be connected to ground through one of directly, a current bias source, via a resistor, impeditive element or current generator. A voltage bias network may be connected to gates of the first and second transistors. According to a second embodiment, the oscillator circuit comprises: a first transistor pair, a second transistor pair, a resonant element arranged connected to the drains of a first and a second active element pair, first and second active element pair, each transistor pair has gate and drain connected, wherein a drain of a first transistor in the transistor pair is connected to gate common of a second transistor in the transistor pair, a supply voltage source connected to the sources of the first and second transistors, and additional feedback elements connected between the drains and gates of the active elements. The resonant elements may comprise one or several of LC circuits and the feedback elements may comprise capacitors or transformers. The additional feedback loops may comprise transistors having their gates connected to the drains of the same transistors, respectively, and their outputs (drain) connected to the gates of transistors. A bias voltage can be applied to the sources of the feedback transistors. Preferably, the feedback loop comprises an inverter network and/or an amplifier. The invention also relates to a method of providing an oscillator with fast switching characteristics and current pulse optimization, the method comprising the steps of: arranging an oscillator circuit with a resonant element, an active element and a feedback loop, and providing the circuit with an additional feedback loop comprising a phase shifting element. The invention also relates to an electrical circuit comprising an oscillator as mentioned above. BRIEF DESCRIPTION OF THE DRAWINGS In the following, the invention will be further described in a non-limiting way with reference to the accompanying drawings, in which: Figs, 1a and 1b schematically illustrate electrical circuits with oscillator topologies according to prior art, Figs. 2a and 2b schematically illustrate electrical circuits with oscillator topologies according to the basic concept of the present invention corresponding to the circuits illustrated in Figs, 1a and 1b, respectively, Fig. 3 is a schematic diagram illustrating a third embodiment of the invention, Fig. 4 is a schematic diagram illustrating a fourth embodiment of the invention, Fig. 5 is a basic oscillator concept, Fig. 6 illustrates the source to ground current graph based on one embodiment of the invention, and Fig. 7 illustrates a graph of phase noise characteristics, based on one embodiment of the invention. DETAILED DESCRIPTION OF THE EMBODIMENTS According to the invention, the circuits according to Figs, 1a and 1b are modified and comprise additional positive feed-back loops with a device having variable gain and variable phase characteristics. By this optimisation a lowered phase noise for the oscillator can be achieved. The active device in the added loop will have a high impedance load, which provides extra voltage gain despite a low current consumption. This is illustrated in Figs. 2a and 2b. Thus, Fig. 2a illustrates an oscillator circuit 200a, according to one exemplary embodiment of the present invention, comprising two resonant elements 201a and 202a, which at a common terminal are fed from a supply voltage 210a (VDD) and connected to the drains of transistors T1a and T2a, respectively. Feedback elements 203a and 204a are connected in series between the drain of one of the transistors to the gate of each other transistor and vice versa. A voltage bias network comprising a source 220a feeding common terminals of, e.g. impedance elements 205a and 206a is connected to the gates of the transistors T1a and T2a. The sources of the transistors are optionally grounded through a current bias source 230a. However, it may also be grounded directly, via a resistor, impeditive element or current generator. The feedback according to the invention comprises amplifier and inverter networks (circuits or elements) 207a and 208a connected between the drain and gate of each transistor T1a and T2a, respectively. The essential characteristic of the feedback elements are phase shifting and amplification. Even though active elements Tla and T2a are illustrated as MOS transistors, it is obvious that they may be substituted by any type of active elements. This is valid for all embodiments illustrated and described herein. Fig. 2b illustrates another oscillator circuit 200b, in accordance with a second exemplary embodiment of the invention and corresponding to the circuit of Fig. lb, in which a resonant element 201b is arranged connected to the drains of active elements T1b and T2b, T3b and T4b. Two transistors T3b and T4b are connected with gate and drain common to T1b and T2b, respectively. The drain of T3b is connected to the gates of T4b and T2b while the drain of T4b is connected to the gates of T3b and T1b. The gate-drain connection between T1b, T2b and T3b, T4b constitutes two feedback loops which allow the oscillator to oscillate. Again, there may be provided feedback elements in the feedback path. The circuit is fed with a supply voltage 210b through the sources of T3b and T4b. The sources of transistors T1b and T2b are grounded. The feedback elements 207b and 208b are connected between the output (drain) and gates of the active elements T1b, T2b, T3b and T4b. 207b and 208b provide the additional feedback loops. Thus, the active elements are connected in pairs and the two pairs are complementary. The circuit may also comprise grounded source. A more detailed exemplary implementation embodiment of the present invention is illustrated in Fig. 3. The resonant elements 301 and 302 comprise LC circuits. The feedback elements 303 and 304 may comprise transformers or other AC coupling elements. The additional positive feedbacks, according to the invention, comprise transistors T5 and T6 having their gates connected to the drains of the transistors T1 and T2, respectively, and their outputs (drain) connected to the gates of the transistors Tl and T2. A control voltage (VCTRL) is applied to the sources of the feedback (PMOS) transistors T5 and T6. Element 305, which may be an inductor or other AC high impedance element, functions as a current generator with or without additional feedback loop. In a fourth exemplary embodiment as illustrated in Fig. 4, similar to the embodiment of Fig. 3, the feedback network comprises an inverter network comprising transistors T5, T6, T7 and T8, and feedback elements 403 and 404. The inverter network in this case comprises N-channel transistors T7 and T8 grounded at source and connected via drain to gates of Tl and T2 and drains of T5 and T6, respectively. To verify the functionality of a circuit according to the present invention some simulations have been carried out. The graph of Fig. 6 illustrates the source to ground current in an oscillator according to Fig. 3, a major difference in current amplitude and the improved current waveform can be observed. A lower current consumption is apparent. Both AC- and DC-components of the current has been reduced. This is due to the enhanced switching and current waveform. In the graph, the dashed line shows the source current time dependency of an ordinary oscillator and the continuous line the source current time dependency of a circuit according to the present invention. It should be noted that both the prior art topology and the embodiment according to the invention provide substantially the same phase noise performance but the power consumption, which is proportional to the mean value of the source to ground current is much lower for the embodiment according to the invention. In the simulated topology, the transistors are assumed as: NMOS 100 um/0.1 μm (W/L = 1000) and PMOS 50 μm/0.1 μm (W/L 500). Fig. 7 illustrates a graph of optimum phase noise performance for the given topology, both with and without the extra feedback loop. In the graph, the dashed line shows the phase noise versus offset frequency of an ordinary oscillator and the continuous line the phase noise versus offset frequency of a circuit according to the present invention. The improved performance does not come with increased power consumption. The oscillator of the invention may be used for any frequencies and within for example radio and communication applications. The invention is not limited to the shown embodiments but can be varied in a number of ways without departing from the scope of the appended claims; the arrangement and the method can be implemented in various ways using different technologies depending on application, functional units, needs and requirements etc. WE CLAIM : 1. An oscillator circuit (200a, 200b, 300, 400) comprising a resonant element (201a, 202a, 201b, 301, 302), an active element and a feedback loop, characterised by an additional feedback loop comprising a phase shifting element. 2. The oscillator circuit of claim 1, wherein said resonant element is connected to a drain of said active element and said feedback loop is connected to gate of said active element and resonant element and said additional feedback loop is connected between drain and gate of said active element. 3. The oscillator circuit of claim 1 or 2, wherein said oscillator circuit (200a) further comprises: two resonant elements (201a, 202a), having a first common terminal fed from a supply voltage (210a) and second terminals connected to the drains of first and second transistors (T1a, T2a), respectively provided as active elements, - feedback elements (203a, 204a) connected between said drain of said first transistor (Tla, T2a) and gate of said second transistor (Tla, T2a), and - a feedback for each transistor comprising said phase shifting element (207a, 208a). 4. The oscillator circuit of claim 3, wherein said feedback comprises an amplifier and inverter networks connected between drain and gate of said first and second transistor (T1a, T2a), respectively. 5. The oscillator circuit of claim 3 or 4, wherein sources of the transistors are connected to ground through one of directly, a current bias source (230a), via a resistor, impeditive element or current generator. 6. The oscillator circuit according to any of claims 3 to 5, comprising a voltage bias network (220a) connected to gates of said first and second transistors (T1a, T2a). 7. The oscillator circuit of claim 1 or 2, wherein said oscillator circuit (200b) comprises: - a first transistor pair (T1b, T2b), - a second transistor pair (T3b, T4b), - a resonant element (201b) arranged connected to the drains of a first and a second active element, feedback elements, - each transistor pair having gate and drain connected, wherein a drain of a first transistor (T1b, T3b) in said transistor pair is connected to gate common of a second transistor (T2b, T4b) in said transistor pair,, - a supply voltage source (210b) connected to the sources of said first and second transistors (T3b, T4b), and - additional feedback elements (207b, 208b) connected between the drains and gates of the active elements 8. The oscillator circuit of claim 1 or 2, wherein the resonant elements comprise one or several of LC circuits. 9. The oscillator circuit of claim 1 or 2, wherein the feedback elements comprise capacitors or transformers. 10. The oscillator circuit of claims 3-9, wherein the additional feedback loops comprise transistors (T5, T6) having their gates connected to the drains of the same transistors (T1, T2), respectively, and their outputs (drain) connected to the gates of transistors (T1,T2). 11. The oscillator circuit of claim 10, wherein a bias voltage (Vbias) is applied to the sources of the feedback transistors (T5, T6). 12. The oscillator circuit of claim 1 or 2, wherein the feedback loop comprises an inverter network. 13. The oscillator circuit of claim 1 or 2, wherein said feedback loop comprises an amplifier. 14. A method of providing an oscillator with fast switching characteristics and current pulse optimization, the method comprising the steps of: - arranging an oscillator circuit (200a, 200b, 300,400) with a resonant element, an active element and a feedback loop, and - providing said circuit with an additional feedback loop comprising a phase shifting element. 15. An electrical circuit comprising an oscillator according to any of claims 1-13. The present invention relates to an oscillator circuit (200a, 200b, 300, 400) comprising a resonant element, an active element, a feedback loop, and an additional loop comprising a phase shifting element. |
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| Patent Number | 271075 | |||||||||
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| Indian Patent Application Number | 1638/KOLNP/2008 | |||||||||
| PG Journal Number | 06/2016 | |||||||||
| Publication Date | 05-Feb-2016 | |||||||||
| Grant Date | 01-Feb-2016 | |||||||||
| Date of Filing | 24-Apr-2008 | |||||||||
| Name of Patentee | TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) | |||||||||
| Applicant Address | SE-164 83 STOCKHOLM | |||||||||
Inventors:
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| PCT International Classification Number | H03B 5/24 | |||||||||
| PCT International Application Number | PCT/SE2005/001429 | |||||||||
| PCT International Filing date | 2005-09-27 | |||||||||
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