Title of Invention | BIPOLAR TRANSISTOR AND METHOD OF MAKING SAME |
---|---|
Abstract | The present invention relates to a high fT and fmax bipolar transistor (100) includes an emitter (104), a base (120), and a collector (116). The emitter has a lower portion (108) and an upper portion (1.12) that extends beyond the lower portion. The base includes an intrinsic base (140) and an extrinsic base (144). The intrinsic base is located between the lower portion of the emitter and the collector. The extrinsic base extends from the lower portion of the emitter beyond the upper portion of the emitter and includes a continuous conductor (148) that extends from underneath the upper portion of the emitter and out from underneath the upper portion of the emitter. The continuous conductor provides a low electrical resistance path from a base contact (not shown) to the intrinsic base. The transistor may include a second conductor (152) that does not extend underneath the upper portion of the emitter, but which further reduces the electrical resistance through the extrinsic base. |
Full Text | HIGH fro and final BIPOLAR TRANSISTOR AND METHOD OF MAKING SAME TECHNICAL FIELD The present invention relates generally to the field of microelectronic semiconductor devices. More particularly, the present invention is directed to a high fax and fame bipolar transistor and method of making the same. shown) and the intrinsic base. During the process of fabricating transistor 20, extrinsic base 64 is typically made by depositing a polysilicon layer 68 atop wafer 36. conductance in the second portion. The first conductance and the second conductance are substantially the same as one another. FIG. 6 is a cross-sectional view of the transistor of FIG. 2 during fabrication illustrating the growth of a second part of the extrinsic base and an isolation layer; Collector pedestal 116 would have an n-type doping and intrinsic base 140 would include a p-type doping. Of course, if transistor 100 were of the p-n-p type, the doping types would be reversed. 124, e.g., using low temperature apiary (LIE) techniques that are well known in the art, so as to provide intrinsic base 140. Intrinsic base layer 156 may include a Present in first extrinsic base layer 164 except underneath landing pad 168, Unreacted metal present on dielectric landing pad 168 may then be stripped off, e.g., using a wet chemical strip. portion 208 of first highly-doped extrinsic base layer 164 beneath the aperture may be oxidized, e.g., using thermal oxidation, to the depth of undated layer 160. The higher What is claimed is: A bipolar device, comprising: (a) a substrate having a collector; (b) an emitter spaced from said collector; A method of forming a bipolar device on a substrate having a collector, comprising the steps of: A method according to claim 7, further comprising the step of forming a second conductor that does not extend undemeath said emitter. A method according to claim 14, wherein said second conductor is formed by silicidation. |
---|
296-CHENP-2006 CLAIMS GRANTED.pdf
296-CHENP-2006 CORRESPONDENCE OTHERS.pdf
296-CHENP-2006 CORRESPONDENCE PO.pdf
296-CHENP-2006 POWER OF ATTORNEY.pdf
296-chenp-2006-correspondnece-others.pdf
296-chenp-2006-correspondnece-po.pdf
296-chenp-2006-description(complete).pdf
Patent Number | 234194 | |||||||||
---|---|---|---|---|---|---|---|---|---|---|
Indian Patent Application Number | 296/CHENP/2006 | |||||||||
PG Journal Number | 24/2009 | |||||||||
Publication Date | 12-Jun-2009 | |||||||||
Grant Date | 08-May-2009 | |||||||||
Date of Filing | 24-Jan-2006 | |||||||||
Name of Patentee | INTERNATIONAL BUSINESS MACHINES CORPORATION | |||||||||
Applicant Address | New Orchard Road, Armonk, New York 10504, | |||||||||
Inventors:
|
||||||||||
PCT International Classification Number | H01L 21/331 | |||||||||
PCT International Application Number | PCT/US2004/019906 | |||||||||
PCT International Filing date | 2004-06-22 | |||||||||
PCT Conventions:
|